[llvm-commits] [llvm] r156518 - in /llvm/trunk/utils/TableGen: CodeGenRegisters.cpp CodeGenRegisters.h

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed May  9 17:09:17 2012
New Revision: 156518

URL: http://llvm.org/viewvc/llvm-project?rev=156518&view=rev
Log:
Rename getSubRegs() to computeSubRegs().

That's what it does.

Modified:
    llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
    llvm/trunk/utils/TableGen/CodeGenRegisters.h

Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.cpp?rev=156518&r1=156517&r2=156518&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenRegisters.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenRegisters.cpp Wed May  9 17:09:17 2012
@@ -157,7 +157,8 @@
     // Only create a unit if no other subregs have units.
     CodeGenRegister *SR = I->second;
     if (SR == this) {
-      // RegUnits are only empty during getSubRegs, prior to computing weight.
+      // RegUnits are only empty during computeSubRegs, prior to computing
+      // weight.
       if (RegUnits.empty())
         RegUnits.push_back(RegBank.newRegUnit(0));
       continue;
@@ -169,7 +170,7 @@
 }
 
 const CodeGenRegister::SubRegMap &
-CodeGenRegister::getSubRegs(CodeGenRegBank &RegBank) {
+CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
   // Only compute this map once.
   if (SubRegsComplete)
     return SubRegs;
@@ -199,11 +200,11 @@
   // Here the order is important - earlier subregs take precedence.
   for (unsigned i = 0, e = SubList.size(); i != e; ++i) {
     CodeGenRegister *SR = RegBank.getReg(SubList[i]);
-    const SubRegMap &Map = SR->getSubRegs(RegBank);
+    const SubRegMap &Map = SR->computeSubRegs(RegBank);
 
     // Add this as a super-register of SR now all sub-registers are in the list.
     // This creates a topological ordering, the exact order depends on the
-    // order getSubRegs is called on all registers.
+    // order computeSubRegs is called on all registers.
     SR->SuperRegs.push_back(this);
 
     for (SubRegMap::const_iterator SI = Map.begin(), SE = Map.end(); SI != SE;
@@ -225,7 +226,7 @@
     CodeGenSubRegIndex *Idx = Indices[i];
     const CodeGenSubRegIndex::CompMap &Comps = Idx->getComposites();
     CodeGenRegister *SR = SubRegs[Idx];
-    const SubRegMap &Map = SR->getSubRegs(RegBank);
+    const SubRegMap &Map = SR->computeSubRegs(RegBank);
 
     // Look at the possible compositions of Idx.
     // They may not all be supported by SR.
@@ -267,7 +268,7 @@
         throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " +
                       Pat->getAsString());
       CodeGenSubRegIndex *Idx = RegBank.getSubRegIdx(IdxInit->getDef());
-      const SubRegMap &R2Subs = R2->getSubRegs(RegBank);
+      const SubRegMap &R2Subs = R2->computeSubRegs(RegBank);
       SubRegMap::const_iterator ni = R2Subs.find(Idx);
       if (ni == R2Subs.end())
         throw TGError(TheDef->getLoc(), "Composite " + Pat->getAsString() +
@@ -301,7 +302,7 @@
   while (!Indices.empty() && !Orphans.empty()) {
     CodeGenSubRegIndex *Idx = Indices.pop_back_val();
     CodeGenRegister *SR = SubRegs[Idx];
-    const SubRegMap &Map = SR->getSubRegs(RegBank);
+    const SubRegMap &Map = SR->computeSubRegs(RegBank);
     for (SubRegMap::const_iterator SI = Map.begin(), SE = Map.end(); SI != SE;
          ++SI)
       if (Orphans.erase(SI->second))
@@ -753,7 +754,7 @@
   // This will create Composite entries for all inferred sub-register indices.
   NumRegUnits = 0;
   for (unsigned i = 0, e = Registers.size(); i != e; ++i)
-    Registers[i]->getSubRegs(*this);
+    Registers[i]->computeSubRegs(*this);
 
   // Native register units are associated with a leaf register. They've all been
   // discovered now.

Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.h?rev=156518&r1=156517&r2=156518&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenRegisters.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenRegisters.h Wed May  9 17:09:17 2012
@@ -100,9 +100,9 @@
 
     const std::string &getName() const;
 
-    // Get a map of sub-registers computed lazily.
+    // Lazily compute a map of all sub-registers.
     // This includes unique entries for all sub-sub-registers.
-    const SubRegMap &getSubRegs(CodeGenRegBank&);
+    const SubRegMap &computeSubRegs(CodeGenRegBank&);
 
     const SubRegMap &getSubRegs() const {
       assert(SubRegsComplete && "Must precompute sub-registers");