[llvm-commits] [llvm] r155891 - /llvm/trunk/lib/Target/X86/X86.td

Craig Topper craig.topper at gmail.com
Mon Apr 30 22:41:41 PDT 2012


Author: ctopper
Date: Tue May  1 00:41:41 2012
New Revision: 155891

URL: http://llvm.org/viewvc/llvm-project?rev=155891&view=rev
Log:
Make XOP imply AVX as its needed to legalize the registers types.

Modified:
    llvm/trunk/lib/Target/X86/X86.td

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=155891&r1=155890&r2=155891&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue May  1 00:41:41 2012
@@ -96,7 +96,8 @@
                                       "Enable four-operand fused multiple-add",
                                       [FeatureAVX]>;
 def FeatureXOP     : SubtargetFeature<"xop", "HasXOP", "true",
-                                      "Enable XOP instructions">;
+                                      "Enable XOP instructions",
+                                      [FeatureAVX]>;
 def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
                                           "HasVectorUAMem", "true",
                  "Allow unaligned memory operands on vector/SIMD instructions">;





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