[llvm-commits] [llvm] r155888 - /llvm/trunk/lib/Target/X86/X86.td

Craig Topper craig.topper at gmail.com
Mon Apr 30 22:28:32 PDT 2012


Author: ctopper
Date: Tue May  1 00:28:32 2012
New Revision: 155888

URL: http://llvm.org/viewvc/llvm-project?rev=155888&view=rev
Log:
Make CLMUL and AES imply SSE2 since its needed to legalize the type.

Modified:
    llvm/trunk/lib/Target/X86/X86.td

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=155888&r1=155887&r2=155888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue May  1 00:28:32 2012
@@ -87,7 +87,8 @@
                                       "Enable AVX2 instructions",
                                       [FeatureAVX]>;
 def FeatureCLMUL   : SubtargetFeature<"clmul", "HasCLMUL", "true",
-                               "Enable carry-less multiplication instructions">;
+                               "Enable carry-less multiplication instructions",
+                               [FeatureSSE2]>;
 def FeatureFMA3    : SubtargetFeature<"fma3", "HasFMA3", "true",
                                       "Enable three-operand fused multiple-add",
                                       [FeatureAVX]>;
@@ -100,7 +101,8 @@
                                           "HasVectorUAMem", "true",
                  "Allow unaligned memory operands on vector/SIMD instructions">;
 def FeatureAES     : SubtargetFeature<"aes", "HasAES", "true",
-                                      "Enable AES instructions">;
+                                      "Enable AES instructions",
+                                      [FeatureSSE2]>;
 def FeatureMOVBE   : SubtargetFeature<"movbe", "HasMOVBE", "true",
                                       "Support MOVBE instruction">;
 def FeatureRDRAND  : SubtargetFeature<"rdrand", "HasRDRAND", "true",





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