[llvm-commits] [llvm] r155618 - in /llvm/trunk/lib/Target/X86: X86.td X86Subtarget.cpp
Andrew Trick
atrick at apple.com
Thu Apr 26 15:53:39 PDT 2012
On Apr 26, 2012, at 3:45 PM, Craig Topper <craig.topper at gmail.com> wrote:
> I don't have access to an AVX machine. I was hoping maybe there was one in the build bots as I was afraid of this. Do you want to revert or let me fix it later tonight?
I imagine you just need to add the right -mcpu option to the tests. You could fix it speculatively based on the list I've given, and if it still passes on non-avx then it should do the same thing on avx.
I won't jump to revert until someone complains or a bot fails... As long as the fix will be in "soon".
-Andy
>
> On Thu, Apr 26, 2012 at 3:03 PM, Andrew Trick <atrick at apple.com> wrote:
>
> On Apr 25, 2012, at 11:40 PM, Craig Topper <craig.topper at gmail.com> wrote:
>
> > Author: ctopper
> > Date: Thu Apr 26 01:40:15 2012
> > New Revision: 155618
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=155618&view=rev
> > Log:
> > Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names.
> >
> > Modified:
> > llvm/trunk/lib/Target/X86/X86.td
> > llvm/trunk/lib/Target/X86/X86Subtarget.cpp
> >
> > Modified: llvm/trunk/lib/Target/X86/X86.td
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=155618&r1=155617&r2=155618&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86.td (original)
> > +++ llvm/trunk/lib/Target/X86/X86.td Thu Apr 26 01:40:15 2012
> > @@ -173,21 +173,19 @@
> > // Sandy Bridge
> > // SSE is not listed here since llvm treats AVX as a reimplementation of SSE,
> > // rather than a superset.
> > -// FIXME: Disabling AVX for now since it's not ready.
> > -def : Proc<"corei7-avx", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,
> > +def : Proc<"corei7-avx", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT,
> > FeatureAES, FeatureCLMUL]>;
> > // Ivy Bridge
> > -def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,
> > +def : Proc<"core-avx-i", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT,
> > FeatureAES, FeatureCLMUL,
> > FeatureRDRAND, FeatureF16C, FeatureFSGSBase]>;
> >
> > // Haswell
> > -// FIXME: Disabling AVX/AVX2/FMA3 for now since it's not ready.
> > -def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,
> > +def : Proc<"core-avx2", [FeatureAVX2, FeatureCMPXCHG16B, FeaturePOPCNT,
> > FeatureAES, FeatureCLMUL, FeatureRDRAND,
> > FeatureF16C, FeatureFSGSBase,
> > FeatureMOVBE, FeatureLZCNT, FeatureBMI,
> > - FeatureBMI2]>;
> > + FeatureBMI2, FeatureFMA3]>;
> >
> > def : Proc<"k6", [FeatureMMX]>;
> > def : Proc<"k6-2", [Feature3DNow]>;
> >
> > Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=155618&r1=155617&r2=155618&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
> > +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Thu Apr 26 01:40:15 2012
> > @@ -196,8 +196,7 @@
> > if ((ECX >> 9) & 1) { X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);}
> > if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}
> > if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}
> > - // FIXME: AVX codegen support is not ready.
> > - //if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }
> > + if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }
> >
> > bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
> > bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
> > @@ -299,11 +298,10 @@
> > HasBMI = true;
> > ToggleFeature(X86::FeatureBMI);
> > }
> > - // FIXME: AVX2 codegen support is not ready.
> > - //if ((EBX >> 5) & 0x1) {
> > - // X86SSELevel = AVX2;
> > - // ToggleFeature(X86::FeatureAVX2);
> > - //}
> > + if ((EBX >> 5) & 0x1) {
> > + X86SSELevel = AVX2;
> > + ToggleFeature(X86::FeatureAVX2);
> > + }
> > if ((EBX >> 8) & 0x1) {
> > HasBMI2 = true;
> > ToggleFeature(X86::FeatureBMI2);
>
>
> Craig,
>
> Did you run make check on an AVX machine? I think you need to fix a bunch of lit tests before you can make this change...
>
> Failing Tests (34):
> LLVM :: CodeGen/X86/2006-05-11-InstrSched.ll
> LLVM :: CodeGen/X86/2009-02-26-MachineLICMBug.ll
> LLVM :: CodeGen/X86/2011-12-15-vec_shift.ll
> LLVM :: CodeGen/X86/break-sse-dep.ll
> LLVM :: CodeGen/X86/gather-addresses.ll
> LLVM :: CodeGen/X86/illegal-vector-args-return.ll
> LLVM :: CodeGen/X86/lsr-reuse-trunc.ll
> LLVM :: CodeGen/X86/pmul.ll
> LLVM :: CodeGen/X86/sink-hoist.ll
> LLVM :: CodeGen/X86/splat-scalar-load.ll
> LLVM :: CodeGen/X86/sse-align-12.ll
> LLVM :: CodeGen/X86/sse-domains.ll
> LLVM :: CodeGen/X86/sse-minmax.ll
> LLVM :: CodeGen/X86/sse41.ll
> LLVM :: CodeGen/X86/twoaddr-coalesce-2.ll
> LLVM :: CodeGen/X86/vec_insert-6.ll
> LLVM :: CodeGen/X86/vec_set-3.ll
> LLVM :: CodeGen/X86/vec_shuffle-16.ll
> LLVM :: CodeGen/X86/vec_shuffle-19.ll
> LLVM :: CodeGen/X86/vec_shuffle-27.ll
> LLVM :: CodeGen/X86/vec_shuffle-36.ll
> LLVM :: CodeGen/X86/vec_shuffle-37.ll
> LLVM :: CodeGen/X86/vec_shuffle-39.ll
> LLVM :: CodeGen/X86/vec_splat-2.ll
> LLVM :: CodeGen/X86/vec_splat-3.ll
> LLVM :: CodeGen/X86/vec_splat-4.ll
> LLVM :: CodeGen/X86/vec_splat.ll
> LLVM :: CodeGen/X86/widen_cast-2.ll
> LLVM :: CodeGen/X86/widen_conv-4.ll
> LLVM :: CodeGen/X86/widen_extract-1.ll
> LLVM :: CodeGen/X86/x86-64-dead-stack-adjust.ll
> LLVM :: ExecutionEngine/2003-01-04-ArgumentBug.ll
> LLVM :: ExecutionEngine/test-fp-no-external-funcs.ll
> LLVM :: ExecutionEngine/test-fp.ll
>
> -Andy
>
>
>
> --
> ~Craig
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