[llvm-commits] Fix for disassembling unpredictable arithmetic/adc/sbc instructions fon ARM

[Owen Anderson]

LGTM.

--Owen

On Mar 28, 2012, at 3:19 AM, Silviu Baranga <silbar01 at arm.com> wrote:

> Hi,
>  
> Here are two patches that make the disassembler
> emit warnings when decoding some unpredictable
> instructions on ARM. Previously the disassembler
> would emit errors or accept these instructions as
> being predictable.
>  
> This is done by changing some register classes
> to not allow the pc operand, and by specifying
> the unpredictable bit fields.
>  
> AAI.diff : The patch affects arithmetic instructions,
>    modifies and renames the ‘invalid-LDRT-arm.txt’
>    test  to ‘unpredictable-SHADD16-arm.txt’ because
>    it actually decodes an unpredictable shadd16
>    instruction.
> adc.diff:  This patch affects the adc/sbc instructions.
>   It also adds a regression test.
>  
> Please review.
>  
> Thanks,
> Silviu
> <AAI.diff><adc.diff>_______________________________________________
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