[llvm-commits] [llvm] r153699 - /llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td

[Jakob Stoklund Olesen]

Author: stoklund
Date: Thu Mar 29 17:54:32 2012
New Revision: 153699

URL: http://llvm.org/viewvc/llvm-project?rev=153699&view=rev
Log:
Prefer even-odd D-register pairs.

We are sometimes allocatinog from the DPair register class which
contains odd-even pairs in addition to the Q registers.

Place the Q registers first in the DPair allocation order as they can be
copied with a single instruction. The odd-even pairs should only be
allocated as a last resort.

Modified:
    llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=153699&r1=153698&r2=153699&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Thu Mar 29 17:54:32 2012
@@ -314,7 +314,8 @@
 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
                           128, (interleave QPR, TuplesOE2D)> {
   // Allocate starting at non-VFP2 registers D16-D31 first.
-  let AltOrders = [(rotl DPair, 16)];
+  // Prefer even-odd pairs as they are easier to copy.
+  let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
   let AltOrderSelect = [{ return 1; }];
 }