[llvm-commits] [llvm] r153615 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/Passes.cpp lib/Target/PTX/PTXTargetMachine.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed Mar 28 18:54:28 2012
New Revision: 153615

URL: http://llvm.org/viewvc/llvm-project?rev=153615&view=rev
Log:
Enable machine code verification in the entire code generator.

Some targets still mess up the liveness information, but that isn't
verified after MRI->invalidateLiveness().

The verifier can still check other useful things like register classes
and CFG, so it should be enabled after all passes.

Modified:
    llvm/trunk/include/llvm/CodeGen/Passes.h
    llvm/trunk/lib/CodeGen/Passes.cpp
    llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp

Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=153615&r1=153614&r2=153615&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Mar 28 18:54:28 2012
@@ -223,11 +223,6 @@
   /// regalloc pass.
   FunctionPass *createRegAllocPass(bool Optimized);
 
-  /// printNoVerify - Add a pass to dump the machine function, if debugging is
-  /// enabled.
-  ///
-  void printNoVerify(const char *Banner) const;
-
   /// printAndVerify - Add a pass to dump then verify the machine function, if
   /// those steps are enabled.
   ///

Modified: llvm/trunk/lib/CodeGen/Passes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Passes.cpp?rev=153615&r1=153614&r2=153615&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/Passes.cpp (original)
+++ llvm/trunk/lib/CodeGen/Passes.cpp Wed Mar 28 18:54:28 2012
@@ -272,11 +272,6 @@
   return FinalID;
 }
 
-void TargetPassConfig::printNoVerify(const char *Banner) const {
-  if (TM->shouldPrintMachineCode())
-    PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
-}
-
 void TargetPassConfig::printAndVerify(const char *Banner) const {
   if (TM->shouldPrintMachineCode())
     PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
@@ -403,7 +398,7 @@
   // Second pass scheduler.
   if (getOptLevel() != CodeGenOpt::None) {
     addPass(PostRASchedulerID);
-    printNoVerify("After PostRAScheduler");
+    printAndVerify("After PostRAScheduler");
   }
 
   // GC
@@ -416,7 +411,7 @@
     addBlockPlacement();
 
   if (addPreEmitPass())
-    printNoVerify("After PreEmit passes");
+    printAndVerify("After PreEmit passes");
 }
 
 /// Add passes that optimize machine instructions in SSA form.
@@ -628,6 +623,6 @@
     if (EnableBlockPlacementStats)
       addPass(MachineBlockPlacementStatsID);
 
-    printNoVerify("After machine block placement.");
+    printAndVerify("After machine block placement.");
   }
 }

Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp?rev=153615&r1=153614&r2=153615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp Wed Mar 28 18:54:28 2012
@@ -152,10 +152,10 @@
 /// Add passes that optimize machine instructions after register allocation.
 void PTXPassConfig::addMachineLateOptimization() {
   if (addPass(BranchFolderPassID) != &NoPassID)
-    printNoVerify("After BranchFolding");
+    printAndVerify("After BranchFolding");
 
   if (addPass(TailDuplicateID) != &NoPassID)
-    printNoVerify("After TailDuplicate");
+    printAndVerify("After TailDuplicate");
 }
 
 bool PTXPassConfig::addPreEmitPass() {