[llvm-commits] Ready for commit: X86 load/dec-or-store/store to dec-or-inc

[Joel Jones]

I only have "commit after approval permission", so if someone could do the honors.

The second attachment is after doing:

svn rename dec-eflags-lower.ll rd-mod-wr-eflag

in test/CodeGen/X86.  Below my name is the check-in comment.

Joel

For X86, change load/dec-or-inc/store into dec-or-inc, respectively.

This is a code change to add support for changing instruction sequences of the form:

  load
  inc/dec of 8/16/32/64 bits
  store

into the appropriate X86 inc/dec through memory instruction:

  inc[qlwb] / dec[qlwb]

The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better
named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode.  The comments have also been expanded.

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