[llvm-commits] [llvm] r153153 - in /llvm/trunk: lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp test/MC/Mips/elf-bigendian.ll

[Rafael Espíndola]

> +; Check that this is big endian.
> +; CHECK: ('e_indent[EI_DATA]', 0x02)
> +
> +; Make sure that a section table (text) entry is correct.
> +; CHECK:   (('sh_name', 0x{{[0]*}}5) # '.text'
> +; CHECKNEXT:   ('sh_type', 0x{{[0]*}}1)
> +; CHECKNEXT:   ('sh_flags', 0x{{[0]*}}6)
> +; CHECKNEXT:   ('sh_addr', 0x{{{[0-9,a-f]+}})
> +; CHECKNEXT:   ('sh_offset', 0x{{{[0-9,a-f]+}})
> +; CHECKNEXT:   ('sh_size', 0x{{{[0-9,a-f]+}})
> +; CHECKNEXT:   ('sh_link', 0x{{[0]+}})
> +; CHECKNEXT:   ('sh_info', 0x{{[0]+}})
> +; CHECKNEXT:   ('sh_addralign', 0x{{[0]*}}4)
> +; CHECKNEXT:   ('sh_entsize', 0x{{[0]+}})

It is CHECK-NEXT

> +; See that at least first 3 instructions are correct: GP prologue
> +; CHECKNEXT:   ('_section_data', '3c1c0000 279c0000 0399e021 {{[0-9,a-f]*}}')

You should not use a .ll file for this and assume you know which
instructions are being generated. I see that MIPS is even getting
support for a disassembler, you should be able to support assembling
at least these 3 instructions :-)

Cheers,
Rafael