[llvm-commits] [llvm] r153222 - in /llvm/trunk/test/CodeGen: Generic/misched.ll X86/lsr-reuse.ll X86/misched-new.ll X86/remat-scalar-zero.ll X86/zext-sext.ll

[Andrew Trick]

Author: atrick
Date: Wed Mar 21 17:31:31 2012
New Revision: 153222

URL: http://llvm.org/viewvc/llvm-project?rev=153222&view=rev
Log:
misched: tag a few XFAILs that I plan to fix

Added:
    llvm/trunk/test/CodeGen/X86/misched-new.ll
      - copied, changed from r153221, llvm/trunk/test/CodeGen/Generic/misched.ll
Removed:
    llvm/trunk/test/CodeGen/Generic/misched.ll
Modified:
    llvm/trunk/test/CodeGen/X86/lsr-reuse.ll
    llvm/trunk/test/CodeGen/X86/remat-scalar-zero.ll
    llvm/trunk/test/CodeGen/X86/zext-sext.ll

Removed: llvm/trunk/test/CodeGen/Generic/misched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/misched.ll?rev=153221&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/misched.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/misched.ll (removed)
@@ -1,20 +0,0 @@
-; RUN: true
-; llc -enable-misched -misched=shuffle -misched-bottomup < %s
-;
-; Interesting MachineScheduler cases.
-
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
-
-; From oggenc.
-; After coalescing, we have a dead superreg (RAX) definition.
-define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
-entry:
-  br i1 undef, label %for.cond.preheader, label %if.end
-
-for.cond.preheader:                               ; preds = %entry
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind
-  unreachable
-
-if.end:                                           ; preds = %entry
-  ret void
-}

Modified: llvm/trunk/test/CodeGen/X86/lsr-reuse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-reuse.ll?rev=153222&r1=153221&r2=153222&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-reuse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-reuse.ll Wed Mar 21 17:31:31 2012
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
 target datalayout = "e-p:64:64:64"
 target triple = "x86_64-unknown-unknown"

Copied: llvm/trunk/test/CodeGen/X86/misched-new.ll (from r153221, llvm/trunk/test/CodeGen/Generic/misched.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-new.ll?p2=llvm/trunk/test/CodeGen/X86/misched-new.ll&p1=llvm/trunk/test/CodeGen/Generic/misched.ll&r1=153221&r2=153222&rev=153222&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/misched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-new.ll Wed Mar 21 17:31:31 2012
@@ -1,5 +1,6 @@
-; RUN: true
-; llc -enable-misched -misched=shuffle -misched-bottomup < %s
+; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
+; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ;
 ; Interesting MachineScheduler cases.
 
@@ -7,6 +8,10 @@
 
 ; From oggenc.
 ; After coalescing, we have a dead superreg (RAX) definition.
+;
+; CHECK: xorl %esi, %esi
+; CHECK: movl $32, %ecx
+; CHECK: rep;movsl
 define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
 entry:
   br i1 undef, label %for.cond.preheader, label %if.end

Modified: llvm/trunk/test/CodeGen/X86/remat-scalar-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/remat-scalar-zero.ll?rev=153222&r1=153221&r2=153222&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/remat-scalar-zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/remat-scalar-zero.ll Wed Mar 21 17:31:31 2012
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
 ; RUN: not grep xor %t
 ; RUN: not grep movap %t

Modified: llvm/trunk/test/CodeGen/X86/zext-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-sext.ll?rev=153222&r1=153221&r2=153222&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-sext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-sext.ll Wed Mar 21 17:31:31 2012
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 | FileCheck %s
 ; <rdar://problem/8006248>