[llvm-commits] [llvm] r152580 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/X86/x86_errors.s

[Kevin Enderby]

Author: enderby
Date: Mon Mar 12 16:32:09 2012
New Revision: 152580

URL: http://llvm.org/viewvc/llvm-project?rev=152580&view=rev
Log:
Added a missing error check for X86 assembly with mismatched base and index
registers not both being 64-bit or both being 32-bit registers.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/test/MC/X86/x86_errors.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=152580&r1=152579&r2=152580&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Mar 12 16:32:09 2012
@@ -838,6 +838,7 @@
   // If we reached here, then we just ate the ( of the memory operand.  Process
   // the rest of the memory operand.
   unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
+  SMLoc IndexLoc;
 
   if (getLexer().is(AsmToken::Percent)) {
     SMLoc StartLoc, EndLoc;
@@ -851,6 +852,7 @@
 
   if (getLexer().is(AsmToken::Comma)) {
     Parser.Lex(); // Eat the comma.
+    IndexLoc = Parser.getTok().getLoc();
 
     // Following the comma we should have either an index register, or a scale
     // value. We don't support the later form, but we want to parse it
@@ -912,6 +914,23 @@
   SMLoc MemEnd = Parser.getTok().getLoc();
   Parser.Lex(); // Eat the ')'.
 
+  // If we have both a base register and an index register make sure they are
+  // both 64-bit or 32-bit registers.
+  if (BaseReg != 0 && IndexReg != 0) {
+    if (X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) &&
+        !X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) &&
+        IndexReg != X86::RIZ) {
+      Error(IndexLoc, "index register is 32-bit, but base register is 64-bit");
+      return 0;
+    }
+    if (X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) &&
+        !X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg) &&
+        IndexReg != X86::EIZ){
+      Error(IndexLoc, "index register is 64-bit, but base register is 32-bit");
+      return 0;
+    }
+  }
+
   return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
                                MemStart, MemEnd);
 }

Modified: llvm/trunk/test/MC/X86/x86_errors.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_errors.s?rev=152580&r1=152579&r2=152580&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86_errors.s (original)
+++ llvm/trunk/test/MC/X86/x86_errors.s Mon Mar 12 16:32:09 2012
@@ -24,3 +24,7 @@
 // rdar://10710167
 // 64: error: expected scale expression
 lea (%rsp, %rbp, $4), %rax
+
+// rdar://10423777
+// 64: error: index register is 32-bit, but base register is 64-bit
+movq (%rsi,%ecx),%xmm0