[llvm-commits] [llvm] r151615 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

[Akira Hatanaka]

Author: ahatanak
Date: Mon Feb 27 21:18:43 2012
New Revision: 151615

URL: http://llvm.org/viewvc/llvm-project?rev=151615&view=rev
Log:
Add comments.

Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=151615&r1=151614&r2=151615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Mon Feb 27 21:18:43 2012
@@ -752,6 +752,10 @@
 // instructions 0 and 1 in the sequence above during MC lowering.
 // SETGP2 is emitted just before register allocation and converted to
 // instruction 2 just prior to post-RA scheduling.
+//
+// These pseudo instructions are needed to ensure no instructions are inserted
+// before or between instructions 0 and 1, which is a limitation imposed by
+// GNU linker.
 
 def SETGP01 : MipsPseudo<(outs CPURegs:$dst), (ins), "", []>;
 def SETGP2 : MipsPseudo<(outs CPURegs:$globalreg), (ins CPURegs:$picreg), "",