[llvm-commits] PATCH: Add 64-bit architecture predicate to llvm::Triple

[Chris Lattner]

On Jan 30, 2012, at 8:51 PM, Chandler Carruth wrote:

> On Mon, Jan 30, 2012 at 10:08 AM, James Molloy <james.molloy at arm.com> wrote:
> Hi Chandler,
> 
>  
> 
> One point:
> 
>  
> 
> +  /// Note that this tests for 16-bit pointer width, and nothing else.
> 
>  
> 
> I’m not sure this comment is accurate. For example, real mode x86 would be 16-bit but has 24-bit pointers (seg:offset).
> 
> 
> As far as I can tell, there is no support for x86-16 or real mode or any of the other segmented addressing modes on x86. If such modes are added, I would be quite happy for them to return false on all three of these queries. ;] I still think "pointer size" is the most descriptive term, but I'm open to more suggestions.
> 
> FWIW, the reason I don't particularly like "native width of the register file" is that i find it much less clear and unambiguous given the diversity of register widths on even modern architectures. However, addresses generally have a fixed size on modern architectures, and so that seems a good classification scheme.

Just my contribution to the bikeshed: I don't think that it makes sense for llvm::Triple to know the "native width of the register file", since that is such an amorphous statement.  The best that llvm::Triple can know is sizeof(void*) in the default address space.

-Chris

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