[llvm-commits] [llvm][PATCH - REVISED][Review request] X86 Instruction scheduler for the Intel Atom

Andrew Trick atrick at apple.com
Mon Jan 30 14:56:55 PST 2012


Thanks. I'm reviewing your patch today.
-Andy

On Jan 30, 2012, at 2:55 PM, "Gurd, Preston" <preston.gurd at intel.com> wrote:

> Ping…
>  
> From: Gurd, Preston 
> Sent: Monday, January 23, 2012 6:06 PM
> To: Evan Cheng
> Cc: llvm-commits at cs.uiuc.edu
> Subject: [llvm][PATCH - REVISED][Review request] X86 Instruction scheduler for the Intel Atom
>  
> Revision 2: Tests which were failing, when run on an Atom, due to the tests finding a schedule different from what was expected, have been changed to use “-mcpu=generic” in order to prevent the Atom scheduler from running, so that all “make check” tests pass.
>  
> From: Gurd, Preston 
> Sent: Tuesday, January 17, 2012 4:29 PM
> To: Evan Cheng
> Cc: llvm-commits at cs.uiuc.edu
> Subject: [llvm-commits] [llvm][PATCH - REVISED][Review request] X86 Instruction scheduler for the Intel Atom
>  
> The attached patch implements most of an instruction scheduler for the Intel Atom.
>  
> It adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.
>  
> It sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.
>  
> It adds a test to verify that the scheduler is working.
>  
> I realize that this patch is kind of large, but please consider that the vast majority of the changes consist only of adding an instruction itinerary class name to an instruction.
>  
> Revision: the patch also changes the scheduling preference to “Hybrid” for i386 Atom, while leaving x86_64 as ILP.
>  
> Please commit the patch if it seems acceptable.
>  
> Preston
>  
>  
> From: Evan Cheng [mailto:evan.cheng at apple.com] 
> Sent: Monday, January 16, 2012 12:01 PM
> To: Gurd, Preston
> Cc: llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] [llvm][PATCH][Review request] X86 Instruction scheduler for the Intel Atom
>  
> Very nice. One question, I noticed you haven't changed the scheduling preference so x86_64 is still using ILP scheduler while i386 is using register pressure reduction scheduler. Have you tried changing the preference to latency scheduler for Atom?
>  
> Evan
>  
> On Jan 13, 2012, at 3:26 PM, Gurd, Preston wrote:
>  
> 
> The attached patch implements most of an instruction scheduler for the Intel Atom.
>  
> It adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.
>  
> It sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.
>  
> It adds a test to verify that the scheduler is working.
>  
> I realize that this patch is kind of large, but please consider that the vast majority of the changes consist only of adding an instruction itinerary class name to an instruction.
>  
> --
> Preston Gurd <preston.gurd at intel.com>
>   Intel Waterloo
>  
>  
> <llvm-x86-scheduler.diff>

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