[llvm-commits] XOP Intrinsics patch

[Jan Sjodin]

Finally got back to fixing this. I fixed the memops and refactored most patterns to include the intrinsics, not sure how to do vpcom and vpcmov so I kept them as-is. Added memory access tests for each unique kind of instruction for the intrinsics.

- Jan




>________________________________
> From: Craig Topper <craig.topper at gmail.com>
>To: Jan Sjodin <jan_sjodin at yahoo.com> 
>Cc: "llvm-commits at cs.uiuc.edu" <llvm-commits at cs.uiuc.edu> 
>Sent: Tuesday, January 3, 2012 4:23 PM
>Subject: Re: [llvm-commits] XOP Intrinsics patch
> 
>
>On Tue, Jan 3, 2012 at 12:00 PM, Jan Sjodin <jan_sjodin at yahoo.com> wrote:
>
>>All integer vector loads in patterns need to be memopv2i64(!28-bit) or memopv4i64(256-bit) and bitcasted to the correct type because all integer vector loads are promoted to v2i64 or v4i64. So for instance
>>
>>>
>>>+def : Pat<(int_x86_xop_vphsubwd (alignedloadv8i16 addr:$src1)),
>>>+          (VPHSUBWDrm addr:$src1)>;
>>>
>>>Needs to be
>>>
>>>+def : Pat<(int_x86_xop_vphsubwd (bc_v8i16 (memopv2i64 addr:$src1))),
>>>+          (VPHSUBWDrm addr:$src1)>;
>>>
>>
>>If the promotion always happens, maybe it would be best to remove patterns like:
>>
>>def memopv8i16 : PatFrag<(ops node:$ptr), (v8i16 (memop node:$ptr))>;
>>def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>;
>>
>>
>>- Jan
>>
>>
>I had meant to do that after I was sure they were all gone. I'll try to check on that tonight and see if they can be removed now.
>
>-- 
>~Craig
>
>
>
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