[llvm-commits] [llvm] r147773 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Chandler Carruth chandlerc at gmail.com
Mon Jan 9 01:47:25 PST 2012


Author: chandlerc
Date: Mon Jan  9 03:47:25 2012
New Revision: 147773

URL: http://llvm.org/viewvc/llvm-project?rev=147773&view=rev
Log:
Don't rely on the fact that shift values are never very large, and thus
this substraction will result in small negative numbers at worst which
become very large positive numbers on assignment and are thus caught by
the <=4 check on the next line. The >0 check clearly intended to catch
these as negative numbers.

Spotted by inspection, and impossible to trigger given the shift widths
that can be used.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=147773&r1=147772&r2=147773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jan  9 03:47:25 2012
@@ -996,7 +996,7 @@
     // allows us to convert the shift and and into an h-register extract and
     // a scaled index.
     if (Shift.getOpcode() == ISD::SRL && Shift.hasOneUse()) {
-      unsigned ScaleLog = 8 - C1->getZExtValue();
+      int ScaleLog = 8 - C1->getZExtValue();
       if (ScaleLog > 0 && ScaleLog < 4 &&
           C2->getZExtValue() == (UINT64_C(0xff) << ScaleLog)) {
         SDValue Eight = CurDAG->getConstant(8, MVT::i8);





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