[llvm-commits] [LLVM, SelectionDAG] fix for #9905: Failure in code selection for llvm intrinsics sqrt/exp

[Stepan Dyatkovskiy]

Please, look at fixed patch in attachment.

Thanks.
-Stepan.

Eli Friedman wrote:
> On Tue, Dec 6, 2011 at 1:46 AM, Stepan Dyatkovskiy<stpworld at narod.ru>  wrote:
>> Sorry for previous post. Forgot to remove extra newlines at the end of file.
>> Fixed file is attached here.
>
> Better... but please try to make it less sensitive to register
> allocation and scheduler choices.
>
> -Eli
>
>>
>> Thanks.
>> -Stepan.
>>
>>
>> Stepan Dyatkovskiy wrote:
>>>
>>> OK. Please look at reworked regression test patch in attachment.
>>>
>>> -Stepan.
>>>
>>> Eli Friedman wrote:
>>>>
>>>> The code changes look fine. Please put all the FileCheck tests into
>>>> one file, and only use CHECK lines for the most important pieces
>>>> (specifically, that we call sinf etc.).
>>>>
>>>> -Eli
>>>>
>>>> On Mon, Dec 5, 2011 at 5:05 AM, Stepan Dyatkovskiy<stpworld at narod.ru>
>>>> wrote:
>>>>>
>>>>> ping.
>>>>>
>>>>> -Stepan.
>>>>>
>>>>> Stepan Dyatkovskiy wrote:
>>>>>>
>>>>>> ping.
>>>>>>
>>>>>> -Stepan
>>>>>>
>>>>>> Stepan Dyatkovskiy wrote:
>>>>>>>
>>>>>>> Hi all. Please find the patch and regression tests in attachment for
>>>>>>> review.
>>>>>>> This patch for ARM. It fixes selection for several instructions that
>>>>>>> works with v4f32 arguments: FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG,
>>>>>>> FLOG2,
>>>>>>> FLOG10, FEXP, FEXP2.
>>>>>>> I'm still worrying about FCOPYSIGN, FNEG, FABS, FCEIL, FTRUNC, FRINT,
>>>>>>> FNEARBYINT, FFLOOR. I could not found a way to add this instructions
>>>>>>> with v2f32 argument to DAG. It seems that it is impossible in ToT. So
>>>>>>> these instructions was not fixed.
>>>>>>>
>>>>>>> -Stepan.
>>>>>>>
>>>>>>>
>>>>>>> _______________________________________________
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>>>>>>
>>>>>>
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>>>>>
>>>>>
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