[llvm-commits] [llvm] r145273 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/2011-11-28-DAGCombineBug.ll test/CodeGen/X86/widen_load-1.ll

Chris Lattner clattner at apple.com
Mon Nov 28 13:47:20 PST 2011

On Nov 28, 2011, at 12:54 PM, Duncan Sands wrote:

> Hi Evan,
>> DAG combine should not increase alignment of loads / stores with alignment less
>> than ABI alignment. These are loads / stores from / to "packed" data structures.
>> Their alignments are intentionally under-specified.
> this doesn't make any sense to me.  Load/store alignment should only be
> increased, say from 2 to 4, if it can be proved that the memory being
> pointed to is 4 byte aligned.  If InferPtrAlignment is working correctly,
> it should only be returning 4 if the memory really is 4 byte aligned.
> If you have to sometimes ignore what InferPtrAlignment returns because
> (presumably) the memory isn't actually 4 byte aligned, doesn't that just
> mean that InferPtrAlignment is buggy and should be fixed?

I agree, this doesn't make any sense to me either.  Underaligned loads are exactly the kind that we want to infer improved alignments for!


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