[llvm-commits] [llvm] r145196 - /llvm/trunk/docs/ReleaseNotes.html
Chris Lattner
sabre at nondot.org
Sun Nov 27 12:51:47 PST 2011
Author: lattner
Date: Sun Nov 27 14:51:47 2011
New Revision: 145196
URL: http://llvm.org/viewvc/llvm-project?rev=145196&view=rev
Log:
distribute various bullets to different sections.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=145196&r1=145195&r2=145196&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Sun Nov 27 14:51:47 2011
@@ -743,210 +743,54 @@
loop dependence analysis
CorrelatedValuePropagation
lib/Transforms/IPO/MergeFunctions.cpp => consider for 3.1.
- -->
+ Integrated assembler on by default for arm/thumb?
-<p><b>llvm-gcc is gone</b>. LLVM's configure script doesn't depend on llvm-gcc anymore, clean layering.</p>
+ -->
-<p>LLVM 3.0 includes several major new capabilities:</p>
-
-<!-- Near dead:
+ <!-- Near dead:
Analysis/RegionInfo.h + Dom Frontiers
SparseBitVector: used in LiveVar.
llvm/lib/Archive - replace with lib object?
- -->
-
-<!--
- Type system rewrite: http://blog.llvm.org/2011/11/llvm-30-type-system-rewrite.html
- Better performance for Neon code in clang due to SRoA improvements.
- New regalloc on by default. Lin scan going away in 3.1
- PGO / builtin_expect improvements (summary needed)
- Big EH rewrite.
- AVX support, assembler, compiler and disassembler.
- IndVar improvements: andy
- PTX backend improvements: Justin
- llvm-rtdyld & MC JIT: JimG
- InstAliases now automatically used in the asmprinter where they are shorter.
- Integrated assembler on by default for arm/thumb?
- PostOrder Dominator frontiers were removed.
- Line Profiling / gcov support
- EH and debug information produced with CFI directives, yielding smaller executables: http://blog.mozilla.com/respindola/2011/05/12/cfi-directives/
- X86-64 generates smaller and faster code at -O0 (fast isel improvements)
- Better code generation for Cortex-A9
- Many APIs take ArrayRef's now.
- Pass manager extension API.
- ARM inline asm constraints implemented.
- LangRef.html#fnattrs uwtable attribute for asynch unwind tables.
- better performance for indirect gotos.
- llvm.prefetch now takes a 4th argument that specifies whether the prefetch happens to the icache or dcache.
- New PackedVector, TinyPtrVector class (see Programmer's Manual)
- New nonlazybind function attribute.
- ARC language specific optimizer (Transforms/ObjCARC) a decent example of language-specific transformation.
- LLVM 3.0 removes support for reading LLVM 2.8 and earlier files. Aim to maintain compatibility all the way back to 3.0 "forever".
-
- New llvm.expect intrinsic.
- Table generated MC expansion logic for pseudo instructions that expand to multiple MC instructions through the PseudoInstExpansion class. (JimG)
- New llvm.fma intrinsic.
-
- Euro dev meeting and main one too.
- New atomics instructions, "#i_fence" instruction, cmpxchg, atomicrmw too. What target support (X86/ARM)? Also 'atomic load/store'. See Atomics.html
- X86: inline assembler supports .code32 and .code64.
- Exception handling rewrite: new landingpad and resume instruction. Unwind gone.
- LowerSetJmp pass removed, unused.
- llvm-objdump / dwarf parser library / llvm-dwarfdump (d0k)
- object file parsing stuff and llvm-size (mspencer)
- llvm-cov (devang)
- Old arm disassembler replaced with a new one based on autogenerated encoding information from ARM .td files.
- Frontend tests removed from llvm/test/Frontend* (was this completed for 3.0?)
- Segmented stack support (X86 only?) Rafael and Sanjoy Das: docs/SegmentedStacks.html should be in CodeGen.html status table?
- X86 backend support for NaCl (David Meyer / Nick L)
- Codegen now supports vector "select" operations on vector comparisons, turning
- them into various optimized code sequences (e.g. using the SSE4/AVX "blend"
- instructions).
- #line directives in integrated assembler
- SSE domain fixing code enabled for AVX (Bruno/Jakob). Domain fixing pass is
- now target independent (ExecutionDepsFix pass). (Jakob)
- X86 backend synthesizes horizontal add/sub instructions from generic code.
- returns_twice attribute (rafael)
- Tablegen has been split into a library, clang tblgen pieces now live in clang.
- The llvm version is now named llvm-tblgen instead of tblgen.
- X86: Tons of encoding improvements and new instructions (e.g. Atom, Ivy Bridge,
- and BMI instructions)
- added to assembler and disassembler (Craig Topper)
- data layout string can encode the natural alignment of the target's stack for better optimization (LangRef.html#datalayout)
- -->
-
-<ul>
-
-<!--
-<li></li>
--->
-
-</ul>
-
-</div>
-
-<!--=========================================================================-->
-
-<!-- EH details: to be moved to a blog post:
-
-
-
-
-<p>One of the biggest changes is that 3.0 has a new exception handling
- system. The old system used LLVM intrinsics to convey the exception handling
- information to the code generator. It worked in most cases, but not
- all. Inlining was especially difficult to get right. Also, the intrinsics
- could be moved away from the <code>invoke</code> instruction, making it hard
- to recover that information.</p>
+ -->
-<p>The new EH system makes exception handling a first-class member of the IR. It
- adds two new instructions:</p>
+<p>LLVM 3.0 includes several major changes:</p>
<ul>
- <li><a href="LangRef.html#i_landingpad"><code>landingpad</code></a> —
- this instruction defines a landing pad basic block. It contains all of the
- information that's needed by the code generator. It's also required to be
- the first non-PHI instruction in the landing pad. In addition, a landing
- pad may be jumped to only by the unwind edge of an <code>invoke</code>
- instruction.</li>
-
- <li><a href="LangRef.html#i_resume"><code>resume</code></a> — this
- instruction causes the current exception to resume traveling up the
- stack. It replaces the <code>@llvm.eh.resume</code> intrinsic.</li>
+<li>llvm-gcc is no longer supported, and not included in the release. We
+ recommend switching to <a
+ href="http://clang.llvm.org/">Clang</a> or <a
+ href="http://dragonegg.llvm.org/">DragonEgg</a>.</li>
+
+<li>The linear scan register allocator has been replaced with a new "greedy"
+ register allocator, enabling live range splitting and many other
+ optimizations that lead to better code quality. Please see its <a
+ href="http://blog.llvm.org/2011/09/greedy-register-allocation-in-llvm-30.html">blog post</a> or its talk at the <a
+ href="http://llvm.org/devmtg/2011-11/">Developer Meeting</a>
+ for more information.</li>
+<li> New <a href="Atomics.html">atomics</a> instructions, "#i_fence" instruction, cmpxchg, atomicrmw too. What target support (X86/ARM)? Also 'atomic load/store'.
+</li>
+<li>The LLVM IR exception handling representation has been redesigned and
+ reimplemented, making it more elegant, fixing a huge number of bugs, and
+ enabling inlining and other optimizations. Please see its blog post (XXX
+ not yet) for more information.</li>
+<li>The LLVM IR Type system has been redesigned and reimplemented, making it
+ faster and solving some long-standing problems.
+ Please see its <a
+ href="http://blog.llvm.org/2011/11/llvm-30-type-system-rewrite.html">blog
+ post</a> for more information.</li>
+
+<li>The MIPS backend has made major leaps in this release, going from an
+ experimental target to being virtually production quality that supports a
+ wide variety of MIPS subtargets. See the <a href="#MIPS">MIPS section</a>
+ below for more information.</li>
+
+<li>The optimizer and code generator now supports gprof and gcov-style coverage
+ and profiling information, and includes a new llvm-cov tool. Clang exposes
+ this through GCC-compatible command line options.</li>
</ul>
-<p>Converting from the old EH API to the new EH API is rather simple, because a
- lot of complexity has been removed. The two intrinsics,
- <code>@llvm.eh.exception</code> and <code>@llvm.eh.selector</code> have been
- superseded by the <code>landingpad</code> instruction. Instead of generating
- a call to <code>@llvm.eh.exception</code> and <code>@llvm.eh.selector</code>:
-
-<div class="doc_code">
-<pre>
-Function *ExcIntr = Intrinsic::getDeclaration(TheModule,
- Intrinsic::eh_exception);
-Function *SlctrIntr = Intrinsic::getDeclaration(TheModule,
- Intrinsic::eh_selector);
-
-// The exception pointer.
-Value *ExnPtr = Builder.CreateCall(ExcIntr, "exc_ptr");
-
-std::vector<Value*> Args;
-Args.push_back(ExnPtr);
-Args.push_back(Builder.CreateBitCast(Personality,
- Type::getInt8PtrTy(Context)));
-
-<i>// Add selector clauses to Args.</i>
-
-// The selector call.
-Builder.CreateCall(SlctrIntr, Args, "exc_sel");
-</pre>
-</div>
-
-<p>You should instead generate a <code>landingpad</code> instruction, that
- returns an exception object and selector value:</p>
-
-<div class="doc_code">
-<pre>
-LandingPadInst *LPadInst =
- Builder.CreateLandingPad(StructType::get(Int8PtrTy, Int32Ty, NULL),
- Personality, 0);
-
-Value *LPadExn = Builder.CreateExtractValue(LPadInst, 0);
-Builder.CreateStore(LPadExn, getExceptionSlot());
-
-Value *LPadSel = Builder.CreateExtractValue(LPadInst, 1);
-Builder.CreateStore(LPadSel, getEHSelectorSlot());
-</pre>
</div>
-<p>It's now trivial to add the individual clauses to the <code>landingpad</code>
- instruction.</p>
-
-<div class="doc_code">
-<pre>
-<i><b>// Adding a catch clause</b></i>
-Constant *TypeInfo = getTypeInfo();
-LPadInst->addClause(TypeInfo);
-
-<i><b>// Adding a C++ catch-all</b></i>
-LPadInst->addClause(Constant::getNullValue(Builder.getInt8PtrTy()));
-
-<i><b>// Adding a cleanup</b></i>
-LPadInst->setCleanup(true);
-
-<i><b>// Adding a filter clause</b></i>
-std::vector<Constant*> TypeInfos;
-Constant *TypeInfo = getFilterTypeInfo();
-TypeInfos.push_back(Builder.CreateBitCast(TypeInfo, Builder.getInt8PtrTy()));
-
-ArrayType *FilterTy = ArrayType::get(Int8PtrTy, TypeInfos.size());
-LPadInst->addClause(ConstantArray::get(FilterTy, TypeInfos));
-</pre>
-</div>
-
-<p>Converting from using the <code>@llvm.eh.resume</code> intrinsic to
- the <code>resume</code> instruction is trivial. It takes the exception
- pointer and exception selector values returned by
- the <code>landingpad</code> instruction:</p>
-
-<div class="doc_code">
-<pre>
-Type *UnwindDataTy = StructType::get(Builder.getInt8PtrTy(),
- Builder.getInt32Ty(), NULL);
-Value *UnwindData = UndefValue::get(UnwindDataTy);
-Value *ExcPtr = Builder.CreateLoad(getExceptionObjSlot());
-Value *ExcSel = Builder.CreateLoad(getExceptionSelSlot());
-UnwindData = Builder.CreateInsertValue(UnwindData, ExcPtr, 0, "exc_ptr");
-UnwindData = Builder.CreateInsertValue(UnwindData, ExcSel, 1, "exc_sel");
-Builder.CreateResume(UnwindData);
-</pre>
-</div>
-
-
-
-
- -->
<!--=========================================================================-->
<h3>
@@ -958,8 +802,15 @@
<p>LLVM IR has several new features for better support of new targets and that
expose new optimization opportunities:</p>
-
-
+ New llvm.expect intrinsic.
+ New llvm.fma intrinsic.
+
+ LangRef.html#fnattrs uwtable attribute for asynch unwind tables.
+ llvm.prefetch now takes a 4th argument that specifies whether the prefetch happens to the icache or dcache.
+ New nonlazybind function attribute.
+ data layout string can encode the natural alignment of the target's stack for better optimization (LangRef.html#datalayout)
+ returns_twice attribute (rafael)
+
</div>
<!--=========================================================================-->
@@ -997,6 +848,8 @@
optimizers:</p>
<ul>
+ Pass manager extension API.
+
<li>Information about <a href="BranchWeightMetadata.html">branch probability</a>
and basic block frequency is now available within LLVM, based on a
combination of static branch prediction heuristics and
@@ -1004,7 +857,9 @@
register spill placement and if-conversion, with additional optimizations
planned for future releases. The same framework is intended for eventual
use with profile-guided optimization.</li>
-</li>
+
+ ARC language specific optimizer (Transforms/ObjCARC) a decent example of language-specific transformation.
+
</ul>
@@ -1038,6 +893,17 @@
the <a href="http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.html">Intro
to the LLVM MC Project Blog Post</a>.</p>
+
+ InstAliases now automatically used in the asmprinter where they are shorter.
+
+ Table generated MC expansion logic for pseudo instructions that expand to multiple MC instructions through the PseudoInstExpansion class. (JimG)
+
+ #line directives in integrated assembler
+
+ llvm-rtdyld: JimG
+ llvm-objdump / dwarf parser library / llvm-dwarfdump (d0k)
+ object file parsing stuff and llvm-size (mspencer)
+
</div>
<!--=========================================================================-->
@@ -1052,6 +918,17 @@
make it run faster:</p>
<ul>
+
+ better performance for indirect gotos through new tail dup pass.
+
+ Codegen now supports vector "select" operations on vector comparisons, turning
+ them into various optimized code sequences (e.g. using the SSE4/AVX "blend"
+ instructions).
+
+ EH and debug information produced with CFI directives, yielding smaller executables: http://blog.mozilla.com/respindola/2011/05/12/cfi-directives/
+
+ Domain fixing pass is now target independent (ExecutionDepsFix pass). (Jakob)
+
<!--
<li></li>
-->
@@ -1081,6 +958,16 @@
<code>@llvm.x86.sse42.crc32.32.[8|16|32]</code> and
<code>@llvm.x86.sse42.crc32.64.[8|64]</code>.</li>
+ X86: inline assembler supports .code32 and .code64.
+ AVX support, assembler, compiler and disassembler.
+ X86 backend support for NaCl (David Meyer / Nick L)
+ SSE domain fixing code enabled for AVX (Bruno/Jakob).
+ X86 backend synthesizes horizontal add/sub instructions from generic code.
+ X86: Tons of encoding improvements and new instructions (e.g. Atom, Ivy Bridge,
+ and BMI instructions)
+ added to assembler and disassembler (Craig Topper)
+ X86-64 generates smaller and faster code at -O0 (fast isel improvements)
+
</ul>
</div>
@@ -1098,6 +985,12 @@
<li>Reworked Set Jump Long Jump EH Lowering,</li>
<li>improved support for Cortex-M series processors, and</li>
<li>beta quality integrated assembler support.</li>
+
+ Better code generation for Cortex-A9
+ ARM inline asm constraints implemented.
+ Old arm disassembler replaced with a new one based on autogenerated encoding information from ARM .td files.
+ Better performance for Neon code in clang due to SRoA improvements.
+
</ul>
</div>
@@ -1181,6 +1074,15 @@
from the previous release.</p>
<ul>
+ <li>LLVM's configure script doesn't depend on llvm-gcc anymore, clean layering.</p>
+ LLVM 3.0 removes support for reading LLVM 2.8 and earlier files. Aim to maintain compatibility all the way back to 3.0 "forever".
+ Frontend tests removed from llvm/test/Frontend*
+ Tablegen has been split into a library, clang tblgen pieces now live in clang.
+ The llvm version is now named llvm-tblgen instead of tblgen.
+ PostOrder Dominator frontiers were removed.
+ LowerSetJmp pass removed, unused.
+
+
<li>The <code>LLVMC</code> meta compiler driver was removed.</li>
<li>The <code>LowerSetJmp</code> pass wasn't used effectively by any
target and has been removed.</li>
@@ -1343,8 +1245,8 @@
<ul>
<li>The Alpha, Blackfin, CellSPU, MSP430, PTX, SystemZ and
- XCore backends are experimental, and several of these have already been
- removed from mainline.</li>
+ XCore backends are experimental, and the Alpha, Blackfin and SystemZ
+ targets have already been removed from mainline.</li>
<li>The integrated assembler, disassembler, and JIT is not supported by
several targets. If an integrated assembler is not supported, then a
@@ -1381,6 +1283,130 @@
</div>
+<!--=========================================================================-->
+
+<!-- EH details: to be moved to a blog post:
+
+
+
+
+<p>One of the biggest changes is that 3.0 has a new exception handling
+ system. The old system used LLVM intrinsics to convey the exception handling
+ information to the code generator. It worked in most cases, but not
+ all. Inlining was especially difficult to get right. Also, the intrinsics
+ could be moved away from the <code>invoke</code> instruction, making it hard
+ to recover that information.</p>
+
+<p>The new EH system makes exception handling a first-class member of the IR. It
+ adds two new instructions:</p>
+
+<ul>
+ <li><a href="LangRef.html#i_landingpad"><code>landingpad</code></a> —
+ this instruction defines a landing pad basic block. It contains all of the
+ information that's needed by the code generator. It's also required to be
+ the first non-PHI instruction in the landing pad. In addition, a landing
+ pad may be jumped to only by the unwind edge of an <code>invoke</code>
+ instruction.</li>
+
+ <li><a href="LangRef.html#i_resume"><code>resume</code></a> — this
+ instruction causes the current exception to resume traveling up the
+ stack. It replaces the <code>@llvm.eh.resume</code> intrinsic.</li>
+</ul>
+
+<p>Converting from the old EH API to the new EH API is rather simple, because a
+ lot of complexity has been removed. The two intrinsics,
+ <code>@llvm.eh.exception</code> and <code>@llvm.eh.selector</code> have been
+ superseded by the <code>landingpad</code> instruction. Instead of generating
+ a call to <code>@llvm.eh.exception</code> and <code>@llvm.eh.selector</code>:
+
+<div class="doc_code">
+<pre>
+Function *ExcIntr = Intrinsic::getDeclaration(TheModule,
+ Intrinsic::eh_exception);
+Function *SlctrIntr = Intrinsic::getDeclaration(TheModule,
+ Intrinsic::eh_selector);
+
+// The exception pointer.
+Value *ExnPtr = Builder.CreateCall(ExcIntr, "exc_ptr");
+
+std::vector<Value*> Args;
+Args.push_back(ExnPtr);
+Args.push_back(Builder.CreateBitCast(Personality,
+ Type::getInt8PtrTy(Context)));
+
+<i>// Add selector clauses to Args.</i>
+
+// The selector call.
+Builder.CreateCall(SlctrIntr, Args, "exc_sel");
+</pre>
+</div>
+
+<p>You should instead generate a <code>landingpad</code> instruction, that
+ returns an exception object and selector value:</p>
+
+<div class="doc_code">
+<pre>
+LandingPadInst *LPadInst =
+ Builder.CreateLandingPad(StructType::get(Int8PtrTy, Int32Ty, NULL),
+ Personality, 0);
+
+Value *LPadExn = Builder.CreateExtractValue(LPadInst, 0);
+Builder.CreateStore(LPadExn, getExceptionSlot());
+
+Value *LPadSel = Builder.CreateExtractValue(LPadInst, 1);
+Builder.CreateStore(LPadSel, getEHSelectorSlot());
+</pre>
+</div>
+
+<p>It's now trivial to add the individual clauses to the <code>landingpad</code>
+ instruction.</p>
+
+<div class="doc_code">
+<pre>
+<i><b>// Adding a catch clause</b></i>
+Constant *TypeInfo = getTypeInfo();
+LPadInst->addClause(TypeInfo);
+
+<i><b>// Adding a C++ catch-all</b></i>
+LPadInst->addClause(Constant::getNullValue(Builder.getInt8PtrTy()));
+
+<i><b>// Adding a cleanup</b></i>
+LPadInst->setCleanup(true);
+
+<i><b>// Adding a filter clause</b></i>
+std::vector<Constant*> TypeInfos;
+Constant *TypeInfo = getFilterTypeInfo();
+TypeInfos.push_back(Builder.CreateBitCast(TypeInfo, Builder.getInt8PtrTy()));
+
+ArrayType *FilterTy = ArrayType::get(Int8PtrTy, TypeInfos.size());
+LPadInst->addClause(ConstantArray::get(FilterTy, TypeInfos));
+</pre>
+</div>
+
+<p>Converting from using the <code>@llvm.eh.resume</code> intrinsic to
+ the <code>resume</code> instruction is trivial. It takes the exception
+ pointer and exception selector values returned by
+ the <code>landingpad</code> instruction:</p>
+
+<div class="doc_code">
+<pre>
+Type *UnwindDataTy = StructType::get(Builder.getInt8PtrTy(),
+ Builder.getInt32Ty(), NULL);
+Value *UnwindData = UndefValue::get(UnwindDataTy);
+Value *ExcPtr = Builder.CreateLoad(getExceptionObjSlot());
+Value *ExcSel = Builder.CreateLoad(getExceptionSelSlot());
+UnwindData = Builder.CreateInsertValue(UnwindData, ExcPtr, 0, "exc_ptr");
+UnwindData = Builder.CreateInsertValue(UnwindData, ExcSel, 1, "exc_sel");
+Builder.CreateResume(UnwindData);
+</pre>
+</div>
+
+
+
+
+ -->
+
+
<!-- *********************************************************************** -->
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