[llvm-commits] [llvm] r144472 - in /llvm/trunk/test/CodeGen: ARM/str_pre-2.ll Thumb2/ldr-str-imm12.ll X86/2008-09-18-inline-asm-2.ll X86/2009-04-21-NoReloadImpDef.ll

Jakob Stoklund Olesen stoklund at 2pi.dk
Sat Nov 12 14:39:34 PST 2011


Author: stoklund
Date: Sat Nov 12 16:39:34 2011
New Revision: 144472

URL: http://llvm.org/viewvc/llvm-project?rev=144472&view=rev
Log:
Linear scan is going away.

Modified:
    llvm/trunk/test/CodeGen/ARM/str_pre-2.ll
    llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll
    llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
    llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll

Modified: llvm/trunk/test/CodeGen/ARM/str_pre-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_pre-2.ll?rev=144472&r1=144471&r2=144472&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/str_pre-2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/str_pre-2.ll Sat Nov 12 16:39:34 2011
@@ -1,4 +1,3 @@
-; RUN: llc < %s -mtriple=armv6-linux-gnu -regalloc=linearscan | FileCheck %s
 ; RUN: llc < %s -mtriple=armv6-linux-gnu -regalloc=basic | FileCheck %s
 
 ; The greedy register allocator uses a single CSR here, invalidating the test.

Modified: llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll?rev=144472&r1=144471&r2=144472&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/ldr-str-imm12.ll Sat Nov 12 16:39:34 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s
 ; rdar://7352504
 ; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]".
 
@@ -46,10 +46,10 @@
 
 bb420:                                            ; preds = %bb20, %bb20
 ; CHECK: bb420
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp]
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp, #4]
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp, #8]
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp, #24]
+; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
+; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
+; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
+; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
   store %union.rec* null, %union.rec** @zz_hold, align 4
   store %union.rec* null, %union.rec** @zz_res, align 4
   store %union.rec* %x, %union.rec** @zz_hold, align 4

Modified: llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll?rev=144472&r1=144471&r2=144472&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll Sat Nov 12 16:39:34 2011
@@ -1,4 +1,3 @@
-; RUN: llc < %s -march=x86 -regalloc=linearscan | FileCheck %s
 ; RUN: llc < %s -march=x86 -regalloc=fast       | FileCheck %s
 ; RUN: llc < %s -march=x86 -regalloc=basic      | FileCheck %s
 ; RUN: llc < %s -march=x86 -regalloc=greedy     | FileCheck %s

Modified: llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll?rev=144472&r1=144471&r2=144472&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll Sat Nov 12 16:39:34 2011
@@ -1,5 +1,5 @@
 ; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \
-; RUN:     -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=linearscan < %s | \
+; RUN:     -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=basic < %s | \
 ; RUN:   FileCheck %s
 ; rdar://6808032
 





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