[llvm-commits] [llvm] r144216 - in /llvm/trunk: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll

[Eli Friedman]

Author: efriedma
Date: Wed Nov  9 16:25:12 2011
New Revision: 144216

URL: http://llvm.org/viewvc/llvm-project?rev=144216&view=rev
Log:
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.


Added:
    llvm/trunk/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=144216&r1=144215&r2=144216&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Nov  9 16:25:12 2011
@@ -1783,7 +1783,8 @@
   case ISD::BITCAST:
     // If this is an FP->Int bitcast and if the sign bit is the only
     // thing demanded, turn this into a FGETSIGN.
-    if (!Op.getOperand(0).getValueType().isVector() &&
+    if (!Op.getValueType().isVector() &&
+        !Op.getOperand(0).getValueType().isVector() &&
         NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
         Op.getOperand(0).getValueType().isFloatingPoint()) {
       bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());

Added: llvm/trunk/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll?rev=144216&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll Wed Nov  9 16:25:12 2011
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; PR11319
+
+ at src1_v2i16 = global <2 x i16> <i16 0, i16 1>
+ at res_v2i16  = global <2 x i16> <i16 0, i16 0>
+
+declare <2 x i16> @foo_v2i16(<2 x i16>) nounwind
+
+define void @test_neon_call_return_v2i16() {
+; CHECK: test_neon_call_return_v2i16:
+  %1 = load <2 x i16>* @src1_v2i16
+  %2 = call <2 x i16> @foo_v2i16(<2 x i16> %1) nounwind
+  store <2 x i16> %2, <2 x i16>* @res_v2i16
+  ret void
+}