[llvm-commits] [llvm] r143557 - in /llvm/trunk: lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp test/MC/Disassembler/ARM/arm-tests.txt

Owen Anderson resistor at mac.com
Wed Nov 2 11:03:15 PDT 2011


Author: resistor
Date: Wed Nov  2 13:03:14 2011
New Revision: 143557

URL: http://llvm.org/viewvc/llvm-project?rev=143557&view=rev
Log:
Fix the issue that r143552 was trying to address the _right_ way.  One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear.  This fixes round tripping on this instruction.

Modified:
    llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=143557&r1=143556&r2=143557&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Wed Nov  2 13:03:14 2011
@@ -101,7 +101,9 @@
 
   // A8.6.123 PUSH
   if ((Opcode == ARM::STMDB_UPD || Opcode == ARM::t2STMDB_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
+      MI->getOperand(0).getReg() == ARM::SP &&
+      MI->getNumOperands() > 5) {
+    // Should only print PUSH if there are at least two registers in the list.
     O << '\t' << "push";
     printPredicateOperand(MI, 2, O);
     if (Opcode == ARM::t2STMDB_UPD)
@@ -122,7 +124,9 @@
 
   // A8.6.122 POP
   if ((Opcode == ARM::LDMIA_UPD || Opcode == ARM::t2LDMIA_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
+      MI->getOperand(0).getReg() == ARM::SP &&
+      MI->getNumOperands() > 5) {
+    // Should only print POP if there are at least two registers in the list.
     O << '\t' << "pop";
     printPredicateOperand(MI, 2, O);
     if (Opcode == ARM::t2LDMIA_UPD)

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=143557&r1=143556&r2=143557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Wed Nov  2 13:03:14 2011
@@ -317,3 +317,7 @@
 
 # CHECK: stc2l	p0, c0, [r2], #-96
 0x18 0x0 0x62 0xfc
+
+# CHECK: ldmgt	sp!, {r9}
+0x00 0x02 0xbd 0xc8
+





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