[llvm-commits] patch: x86 vector udiv

[Eli Friedman]

On Tue, Nov 1, 2011 at 6:53 PM, Peter Cooper <peter_cooper at apple.com> wrote:
> Ah yes thanks, i see where in InstCombine i should have put the udiv->shl change.
>
> For the vector shift case.  I'm not sure why a vector shift is different in behavior to multiple scalar shifts.  The only thing I can see in the ISA is that scalar shifts set the CF flag but otherwise i think they are equivalent.  Can you please give more explanation on this?

In the reg-reg form of psrld, the shift amount is a single 64-bit
integer which is used to shift every element.  ISD::SHL shifts each
element independently.

-Eli