[llvm-commits] [llvm] r142841 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

[Eli Friedman]

On Mon, Oct 24, 2011 at 1:24 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> Author: efriedma
> Date: Mon Oct 24 15:24:21 2011
> New Revision: 142841
>
> URL: http://llvm.org/viewvc/llvm-project?rev=142841&view=rev
> Log:
> Add support to the old JIT for acquire/release loads and stores on x86.  PR11207.

Evan, is this okay for 3.0?

-Eli

> Modified:
>    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=142841&r1=142840&r2=142841&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Mon Oct 24 15:24:21 2011
> @@ -589,6 +589,13 @@
>   }
>  }
>
> +static const MCInstrDesc *UpdateOp(MachineInstr &MI, const X86InstrInfo *II,
> +                                   unsigned Opcode) {
> +  const MCInstrDesc *Desc = &II->get(Opcode);
> +  MI.setDesc(*Desc);
> +  return Desc;
> +}
> +
>  template<class CodeEmitter>
>  void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
>                                            const MCInstrDesc *Desc) {
> @@ -596,15 +603,23 @@
>
>   // If this is a pseudo instruction, lower it.
>   switch (Desc->getOpcode()) {
> -  case X86::ADD16rr_DB:   Desc = &II->get(X86::OR16rr); MI.setDesc(*Desc);break;
> -  case X86::ADD32rr_DB:   Desc = &II->get(X86::OR32rr); MI.setDesc(*Desc);break;
> -  case X86::ADD64rr_DB:   Desc = &II->get(X86::OR64rr); MI.setDesc(*Desc);break;
> -  case X86::ADD16ri_DB:   Desc = &II->get(X86::OR16ri); MI.setDesc(*Desc);break;
> -  case X86::ADD32ri_DB:   Desc = &II->get(X86::OR32ri); MI.setDesc(*Desc);break;
> -  case X86::ADD64ri32_DB:Desc = &II->get(X86::OR64ri32);MI.setDesc(*Desc);break;
> -  case X86::ADD16ri8_DB:  Desc = &II->get(X86::OR16ri8);MI.setDesc(*Desc);break;
> -  case X86::ADD32ri8_DB:  Desc = &II->get(X86::OR32ri8);MI.setDesc(*Desc);break;
> -  case X86::ADD64ri8_DB:  Desc = &II->get(X86::OR64ri8);MI.setDesc(*Desc);break;
> +  case X86::ADD16rr_DB:      Desc = UpdateOp(MI, II, X86::OR16rr); break;
> +  case X86::ADD32rr_DB:      Desc = UpdateOp(MI, II, X86::OR32rr); break;
> +  case X86::ADD64rr_DB:      Desc = UpdateOp(MI, II, X86::OR64rr); break;
> +  case X86::ADD16ri_DB:      Desc = UpdateOp(MI, II, X86::OR16ri); break;
> +  case X86::ADD32ri_DB:      Desc = UpdateOp(MI, II, X86::OR32ri); break;
> +  case X86::ADD64ri32_DB:    Desc = UpdateOp(MI, II, X86::OR64ri32); break;
> +  case X86::ADD16ri8_DB:     Desc = UpdateOp(MI, II, X86::OR16ri8); break;
> +  case X86::ADD32ri8_DB:     Desc = UpdateOp(MI, II, X86::OR32ri8); break;
> +  case X86::ADD64ri8_DB:     Desc = UpdateOp(MI, II, X86::OR64ri8); break;
> +  case X86::ACQUIRE_MOV8rm:  Desc = UpdateOp(MI, II, X86::MOV8rm); break;
> +  case X86::ACQUIRE_MOV16rm: Desc = UpdateOp(MI, II, X86::MOV16rm); break;
> +  case X86::ACQUIRE_MOV32rm: Desc = UpdateOp(MI, II, X86::MOV32rm); break;
> +  case X86::ACQUIRE_MOV64rm: Desc = UpdateOp(MI, II, X86::MOV64rm); break;
> +  case X86::RELEASE_MOV8mr:  Desc = UpdateOp(MI, II, X86::MOV8mr); break;
> +  case X86::RELEASE_MOV16mr: Desc = UpdateOp(MI, II, X86::MOV16mr); break;
> +  case X86::RELEASE_MOV32mr: Desc = UpdateOp(MI, II, X86::MOV32mr); break;
> +  case X86::RELEASE_MOV64mr: Desc = UpdateOp(MI, II, X86::MOV64mr); break;
>   }
>
>
>
>
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