[llvm-commits] [llvm] r142381 - in /llvm/trunk: lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neont2-mul-encoding.s

[Jim Grosbach]

Author: grosbach
Date: Tue Oct 18 13:01:52 2011
New Revision: 142381

URL: http://llvm.org/viewvc/llvm-project?rev=142381&view=rev
Log:
ARM vmul assembly parsing for the lane index operand.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/test/MC/ARM/neont2-mul-encoding.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=142381&r1=142380&r2=142381&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Oct 18 13:01:52 2011
@@ -1936,8 +1936,8 @@
              InstrItinClass itin, string OpcodeStr, string Dt,
              ValueType Ty, SDNode ShOp>
   : N3VLane32<0, 1, op21_20, op11_8, 1, 0,
-        (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, nohash_imm:$lane),
-        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm[$lane]", "",
+        (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, VectorIndex32:$lane),
+        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm$lane", "",
         [(set (Ty DPR:$Vd),
               (Ty (ShOp (Ty DPR:$Vn),
                         (Ty (NEONvduplane (Ty DPR_VFP2:$Vm),imm:$lane)))))]> {
@@ -1946,8 +1946,8 @@
 class N3VDSL16<bits<2> op21_20, bits<4> op11_8,
                string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp>
   : N3VLane16<0, 1, op21_20, op11_8, 1, 0,
-        (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, nohash_imm:$lane),
-        NVMulSLFrm, IIC_VMULi16D, OpcodeStr, Dt,"$Vd, $Vn, $Vm[$lane]","",
+        (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, VectorIndex16:$lane),
+        NVMulSLFrm, IIC_VMULi16D, OpcodeStr, Dt,"$Vd, $Vn, $Vm$lane","",
         [(set (Ty DPR:$Vd),
               (Ty (ShOp (Ty DPR:$Vn),
                         (Ty (NEONvduplane (Ty DPR_8:$Vm), imm:$lane)))))]> {

Modified: llvm/trunk/test/MC/ARM/neont2-mul-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neont2-mul-encoding.s?rev=142381&r1=142380&r2=142381&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neont2-mul-encoding.s (original)
+++ llvm/trunk/test/MC/ARM/neont2-mul-encoding.s Tue Oct 18 13:01:52 2011
@@ -22,6 +22,10 @@
 	vmul.p8	d16, d16, d17
 @ CHECK: vmul.p8	q8, q8, q9              @ encoding: [0x40,0xff,0xf2,0x09]
 	vmul.p8	q8, q8, q9
+
+	vmul.i16	d18, d8, d0[3]
+@ CHECK: vmul.i16	d18, d8, d0[3]    @ encoding: [0xd8,0xef,0x68,0x28]
+
 @ CHECK: vqdmulh.s16	d16, d16, d17   @ encoding: [0x50,0xef,0xa1,0x0b]
 	vqdmulh.s16	d16, d16, d17
 @ CHECK: vqdmulh.s32	d16, d16, d17   @ encoding: [0x60,0xef,0xa1,0x0b]
@@ -57,11 +61,7 @@
 @ CHECK: vqdmull.s32	q8, d16, d17    @ encoding: [0xe0,0xef,0xa1,0x0d]
 	vqdmull.s32	q8, d16, d17
 
+@	vmla.i32	q12, q8, d3[0]
+@	vqdmulh.s16	d11, d2, d3[0]
 @ FIXME: vmla.i32	q12, q8, d3[0]    @ encoding: [0xe0,0xff,0xc3,0x80]
-@  vmla.i32	q12, q8, d3[0]
 @ FIXME: vqdmulh.s16	d11, d2, d3[0]    @ encoding: [0x92,0xef,0x43,0xbc]
-@  vqdmulh.s16	d11, d2, d3[0]
-@ FIXME: vmul.i16	d18, d8, d0[3]    @ encoding: [0xd8,0xef,0x68,0x28]
-@  vmul.i16	d18, d8, d0[3]
-
-