[llvm-commits] [llvm] r142240 - /llvm/trunk/test/CodeGen/ARM/vrev.ll
Nadav Rotem
nadav.rotem at intel.com
Mon Oct 17 13:23:23 PDT 2011
Author: nadav
Date: Mon Oct 17 15:23:23 2011
New Revision: 142240
URL: http://llvm.org/viewvc/llvm-project?rev=142240&view=rev
Log:
Add CHECKs and document PR11158.
Modified:
llvm/trunk/test/CodeGen/ARM/vrev.ll
Modified: llvm/trunk/test/CodeGen/ARM/vrev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vrev.ll?rev=142240&r1=142239&r2=142240&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vrev.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vrev.ll Mon Oct 17 15:23:23 2011
@@ -148,8 +148,13 @@
ret void
}
-; vrev <4 x i16> should use VREV32 and not VREV64
+; The type <2 x i16> is legalized to <2 x i32> and need to be trunc-stored
+; to <2 x i16> when stored to memory. Currently ARM scalarizes these stores.
+; See PR 11158
define void @test_vrev64(<4 x i16>* nocapture %source, <2 x i16>* nocapture %dst) nounwind ssp {
+; CHECK: test_vrev64:
+; CHECK: vst1.16
+; CHECK: vst1.16
entry:
%0 = bitcast <4 x i16>* %source to <8 x i16>*
%tmp2 = load <8 x i16>* %0, align 4
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