[llvm-commits] [llvm] r142154 - in /llvm/trunk/test/CodeGen/X86: mmx-vzmovl-2.ll mmx-vzmovl.ll

Nadav Rotem nadav.rotem at intel.com
Sun Oct 16 13:53:20 PDT 2011


Author: nadav
Date: Sun Oct 16 15:53:20 2011
New Revision: 142154

URL: http://llvm.org/viewvc/llvm-project?rev=142154&view=rev
Log:
Add triple to tests.


Modified:
    llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll
    llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll

Modified: llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll?rev=142154&r1=142153&r2=142154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll Sun Oct 16 15:53:20 2011
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep pxor | count 1
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep punpcklqdq | count 1
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep pxor | count 1
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep punpcklqdq | count 1
 	%struct.vS1024 = type { [8 x <4 x i32>] }
 	%struct.vS512 = type { [4 x <4 x i32>] }
 

Modified: llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll?rev=142154&r1=142153&r2=142154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll Sun Oct 16 15:53:20 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep movq | count 2
+; RUN: llc < %s -mtriple=x86_64-linux  -mattr=+mmx,+sse2 | grep movq | count 2
 ; There are no MMX operations here; this is promoted to XMM.
 
 define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {





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