[llvm-commits] [llvm] r141075 - /llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp

[Nadav Rotem]

Author: nadav
Date: Tue Oct  4 07:05:35 2011
New Revision: 141075

URL: http://llvm.org/viewvc/llvm-project?rev=141075&view=rev
Log:
Set operation actions to legal types only.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=141075&r1=141074&r2=141075&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Oct  4 07:05:35 2011
@@ -402,6 +402,9 @@
        i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
     MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
 
+    // Set operation actions to legal types only.
+    if (!isTypeLegal(VT)) continue;
+
     // add/sub are legal for all supported vector VT's.
     setOperationAction(ISD::ADD,     VT, Legal);
     setOperationAction(ISD::SUB,     VT, Legal);
@@ -423,14 +426,12 @@
 
     // Custom lower build_vector, constant pool spills, insert and
     // extract vector elements:
-    if (isTypeLegal(VT)) {
-      setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
-      setOperationAction(ISD::ConstantPool, VT, Custom);
-      setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
-      setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
-      setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
-      setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
-    }
+    setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
+    setOperationAction(ISD::ConstantPool, VT, Custom);
+    setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
+    setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
+    setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
+    setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
   }
 
   setOperationAction(ISD::AND, MVT::v16i8, Custom);