[llvm-commits] [llvm] r140659 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/Target/X86/SSEDomainFix.cpp lib/Target/X86/X86.h lib/Target/X86/X86TargetMachine.cpp test/CodeGen/X86/avx-load-store.ll test/CodeGen/X86/avx-splat.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Tue Sep 27 16:50:46 PDT 2011
Author: stoklund
Date: Tue Sep 27 18:50:46 2011
New Revision: 140659
URL: http://llvm.org/viewvc/llvm-project?rev=140659&view=rev
Log:
Remove X86-dependent stuff from SSEDomainFix.
This also enables domain swizzling for AVX code which required a few
trivial test changes.
The pass will be moved to lib/CodeGen shortly.
Modified:
llvm/trunk/include/llvm/CodeGen/Passes.h
llvm/trunk/lib/Target/X86/SSEDomainFix.cpp
llvm/trunk/lib/Target/X86/X86.h
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/test/CodeGen/X86/avx-load-store.ll
llvm/trunk/test/CodeGen/X86/avx-splat.ll
Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Tue Sep 27 18:50:46 2011
@@ -24,6 +24,7 @@
class MachineFunctionPass;
class PassInfo;
class TargetLowering;
+ class TargetRegisterClass;
class raw_ostream;
/// createUnreachableBlockEliminationPass - The LLVM code generator does not
@@ -225,6 +226,14 @@
///
FunctionPass *createExpandISelPseudosPass();
+ /// createExecutionDependencyFixPass - This pass fixes execution time
+ /// problems with dependent instructions, such as switching execution
+ /// domains to match.
+ ///
+ /// The pass will examine instructions using and defining registers in RC.
+ ///
+ FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
+
} // End llvm namespace
#endif
Modified: llvm/trunk/lib/Target/X86/SSEDomainFix.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/SSEDomainFix.cpp?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/SSEDomainFix.cpp (original)
+++ llvm/trunk/lib/Target/X86/SSEDomainFix.cpp Tue Sep 27 18:50:46 2011
@@ -18,10 +18,12 @@
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "sse-domain-fix"
-#include "X86InstrInfo.h"
+#define DEBUG_TYPE "execution-fix"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Debug.h"
@@ -97,25 +99,27 @@
};
}
-static const unsigned NumRegs = 16;
-
namespace {
class SSEDomainFixPass : public MachineFunctionPass {
static char ID;
SpecificBumpPtrAllocator<DomainValue> Allocator;
SmallVector<DomainValue*,16> Avail;
+ const TargetRegisterClass *const RC;
MachineFunction *MF;
- const X86InstrInfo *TII;
+ const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
MachineBasicBlock *MBB;
+ std::vector<int> AliasMap;
+ const unsigned NumRegs;
DomainValue **LiveRegs;
typedef DenseMap<MachineBasicBlock*,DomainValue**> LiveOutMap;
LiveOutMap LiveOuts;
unsigned Distance;
public:
- SSEDomainFixPass() : MachineFunctionPass(ID) {}
+ SSEDomainFixPass(const TargetRegisterClass *rc)
+ : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
@@ -154,10 +158,9 @@
/// Translate TRI register number to an index into our smaller tables of
/// interesting registers. Return -1 for boring registers.
-int SSEDomainFixPass::RegIndex(unsigned reg) {
- assert(X86::XMM15 == X86::XMM0+NumRegs-1 && "Unexpected sort");
- reg -= X86::XMM0;
- return reg < NumRegs ? (int) reg : -1;
+int SSEDomainFixPass::RegIndex(unsigned Reg) {
+ assert(Reg < AliasMap.size() && "Invalid register");
+ return AliasMap[Reg];
}
DomainValue *SSEDomainFixPass::Alloc(int domain) {
@@ -444,23 +447,33 @@
bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
- TII = static_cast<const X86InstrInfo*>(MF->getTarget().getInstrInfo());
+ TII = MF->getTarget().getInstrInfo();
TRI = MF->getTarget().getRegisterInfo();
MBB = 0;
LiveRegs = 0;
Distance = 0;
- assert(NumRegs == X86::VR128RegClass.getNumRegs() && "Bad regclass");
+ assert(NumRegs == RC->getNumRegs() && "Bad regclass");
// If no XMM registers are used in the function, we can skip it completely.
bool anyregs = false;
- for (TargetRegisterClass::const_iterator I = X86::VR128RegClass.begin(),
- E = X86::VR128RegClass.end(); I != E; ++I)
+ for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
+ I != E; ++I)
if (MF->getRegInfo().isPhysRegUsed(*I)) {
anyregs = true;
break;
}
if (!anyregs) return false;
+ // Initialize the AliasMap on the first use.
+ if (AliasMap.empty()) {
+ // Given a PhysReg, AliasMap[PhysReg] is either the relevant index into RC,
+ // or -1.
+ AliasMap.resize(TRI->getNumRegs(), -1);
+ for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
+ for (const unsigned *AI = TRI->getOverlaps(RC->getRegister(i)); *AI; ++AI)
+ AliasMap[*AI] = i;
+ }
+
MachineBasicBlock *Entry = MF->begin();
SmallPtrSet<MachineBasicBlock*, 16> Visited;
for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 16> >
@@ -501,6 +514,7 @@
return false;
}
-FunctionPass *llvm::createSSEDomainFixPass() {
- return new SSEDomainFixPass();
+FunctionPass *
+llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
+ return new SSEDomainFixPass(RC);
}
Modified: llvm/trunk/lib/Target/X86/X86.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.h (original)
+++ llvm/trunk/lib/Target/X86/X86.h Tue Sep 27 18:50:46 2011
@@ -44,10 +44,6 @@
///
FunctionPass *createX86FloatingPointStackifierPass();
-/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
-/// crossings.
-FunctionPass *createSSEDomainFixPass();
-
/// createX86IssueVZeroUpperPass - This pass inserts AVX vzeroupper instructions
/// before each call to avoid transition penalty between functions encoded with
/// AVX and SSE.
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Sep 27 18:50:46 2011
@@ -133,7 +133,7 @@
bool ShouldPrint = false;
if (OptLevel != CodeGenOpt::None &&
(Subtarget.hasSSE2() || Subtarget.hasAVX())) {
- PM.add(createSSEDomainFixPass());
+ PM.add(createExecutionDependencyFixPass(&X86::VR128RegClass));
ShouldPrint = true;
}
Modified: llvm/trunk/test/CodeGen/X86/avx-load-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-load-store.ll?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-load-store.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-load-store.ll Tue Sep 27 18:50:46 2011
@@ -3,8 +3,8 @@
; CHECK: vmovaps
; CHECK: vmovaps
-; CHECK: vmovapd
-; CHECK: vmovapd
+; CHECK: vmovaps
+; CHECK: vmovaps
; CHECK: vmovaps
; CHECK: vmovaps
define void @test_256_load(double* nocapture %d, float* nocapture %f, <4 x i64>* nocapture %i) nounwind uwtable ssp {
Modified: llvm/trunk/test/CodeGen/X86/avx-splat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-splat.ll?rev=140659&r1=140658&r2=140659&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-splat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-splat.ll Tue Sep 27 18:50:46 2011
@@ -47,7 +47,7 @@
; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
; To:
; shuffle (vload ptr)), undef, <1, 1, 1, 1>
-; CHECK: vmovaps
+; CHECK: vmovdqa
; CHECK-NEXT: vinsertf128 $1
; CHECK-NEXT: vpermilps $-1
define <8 x float> @funcE() nounwind {
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