[llvm-commits] [llvm] r140560 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp lib/Target/ARM/Disassembler/ARMDisassembler.cpp utils/TableGen/EDEmitter.cpp

[Eli Friedman]

On Mon, Sep 26, 2011 at 2:06 PM, Owen Anderson <resistor at mac.com> wrote:
> Author: resistor
> Date: Mon Sep 26 16:06:22 2011
> New Revision: 140560
>
> URL: http://llvm.org/viewvc/llvm-project?rev=140560&view=rev
> Log:
> ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.
>
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
>    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
>    llvm/trunk/utils/TableGen/EDEmitter.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140560&r1=140559&r2=140560&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 26 16:06:22 2011
> @@ -28,6 +28,18 @@
>   let ParserMatchClass = it_mask_asmoperand;
>  }
>
> +// t2_shift_imm: An integer that encodes a shift amount and the type of shift
> +// (asr or lsl). The 6-bit immediate encodes as:
> +//    {5}     0 ==> lsl
> +//            1     asr
> +//    {4-0}   imm5 shift amount.
> +//            asr #32 not allowed
> +def t2_shift_imm : Operand<i32> {
> +  let PrintMethod = "printShiftImmOperand";
> +  let ParserMatchClass = ShifterImmAsmOperand;
> +  let DecoderMethod = "DecodeT2ShifterImmOperand";
> +}
> +
>  // Shifted operands. No register controlled shifts for Thumb2.
>  // Note: We do not support rrx shifted operands yet.
>  def t2_so_reg : Operand<i32>,    // reg imm
> @@ -2023,7 +2035,8 @@
>  }
>
>  def t2SSAT: T2SatI<
> -              (outs rGPR:$Rd), (ins imm1_32:$sat_imm, rGPR:$Rn, shift_imm:$sh),
> +              (outs rGPR:$Rd),
> +              (ins imm1_32:$sat_imm, rGPR:$Rn, t2_shift_imm:$sh),
>               NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", []> {
>   let Inst{31-27} = 0b11110;
>   let Inst{25-22} = 0b1100;
> @@ -2047,7 +2060,8 @@
>  }
>
>  def t2USAT: T2SatI<
> -               (outs rGPR:$Rd), (ins imm0_31:$sat_imm, rGPR:$Rn, shift_imm:$sh),
> +               (outs rGPR:$Rd),
> +               (ins imm0_31:$sat_imm, rGPR:$Rn, t2_shift_imm:$sh),
>                 NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh", []> {
>   let Inst{31-27} = 0b11110;
>   let Inst{25-22} = 0b1110;
> @@ -3928,6 +3942,8 @@
>                 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
>  def : t2InstAlias<"sxth${p} $Rd, $Rm",
>                 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
> +def : t2InstAlias<"sxth${p} $Rd, $Rm",
> +                (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;

Is there some non-obvious difference between this pattern and the
pattern above it?

-Eli