[llvm-commits] [patch] add n32/64 ABI description.

[Liu]

On Fri, Sep 23, 2011 at 10:36 AM, Akira Hatanaka <ahatanak at gmail.com> wrote:
> On Thu, Sep 22, 2011 at 6:48 PM, Liu <proljc at gmail.com> wrote:
>> On Fri, Sep 23, 2011 at 1:17 AM, Akira Hatanaka <ahatanak at gmail.com> wrote:
>>> A few comments. Please let me know if you have any questions.
>>>
>>> - If N64 and N32 have the same calling convention, you should define
>>> just one for both (e.g. CC_MIps64).
>> I'll double check this.
>>
>>> - Arguments passed in Integer registers shadow floating pointer
>>> registers and vice verca. For example, the first doubleword is passed
>>> in either $4 or $f1, the second in
>>> either $5 or $f1, and so on. Probably you will need to use
>>> CCAssignToRegWithShadow (please see ARMCallingConv.td).
>> Thanks, I'll fix it.
>>
>>> - Integer arguments are all promoted to i64.
>> fixed.
>>
>>> - i64 integer arguments should be passed in 64-bit registers (I will
>>> add the register and register file definitions shortly). Also, i64
>>> return value should be in 64-bit registers.
>> I'm not sure about this. Shall we need regs such as "AT_64, V0_64, V1_64..."?
>>
>
> Yes. The definitions were added in r140366.
Everything should be done. Please review again.

--Liu

>
>>> - Arguments that cannot be passed in registers are push to the stack,
>>> so you need to use  CCAssignToStack.
>> Thank you, I'll fix it soon.
>>
>>>
>>> On Thu, Sep 22, 2011 at 12:23 AM, Liu <proljc at gmail.com> wrote:
>>>> Hi
>>>>
>>>> I added n32/64 ABI description for MIPS Backend.
>>>>
>>>> --Liu
>>>>
>>>
>>
>
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