[llvm-commits] [llvm] r139796 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Jim Grosbach]

Author: grosbach
Date: Thu Sep 15 11:16:50 2011
New Revision: 139796

URL: http://llvm.org/viewvc/llvm-project?rev=139796&view=rev
Log:
ARM support the pre-UAL mnemonic 'qsubaddx' for 'qsax.'

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=139796&r1=139795&r2=139796&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Sep 15 11:16:50 2011
@@ -4942,6 +4942,9 @@
 def : MnemonicAlias<"srsed", "srsib">;
 def : MnemonicAlias<"srs", "srsia">;
 
+// QSAX == QSUBADDX
+def : MnemonicAlias<"qsubaddx", "qsax">;
+
 // LDRSBT/LDRHT/LDRSHT post-index offset if optional.
 // Note that the write-back output register is a dummy operand for MC (it's
 // only meaningful for codegen), so we just pass zero here.