[llvm-commits] [llvm] r139736 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Wed Sep 14 16:06:21 2011
New Revision: 139736

URL: http://llvm.org/viewvc/llvm-project?rev=139736&view=rev
Log:
Nested IT blocks are UNPREDICTABLE.  Mark them as such when disassembling them.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=139736&r1=139735&r2=139736&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Sep 14 16:06:21 2011
@@ -567,6 +567,10 @@
     // code and mask operands so that we can apply them correctly
     // to the subsequent instructions.
     if (MI.getOpcode() == ARM::t2IT) {
+      // Nested IT blocks are UNPREDICTABLE.
+      if (!ITBlock.empty())
+        return MCDisassembler::SoftFail;
+
       // (3 - the number of trailing zeros) is the number of then / else.
       unsigned firstcond = MI.getOperand(0).getImm();
       unsigned Mask = MI.getOperand(1).getImm();