[llvm-commits] [llvm] r139553 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-basic.ll

[Chris Lattner]

On Sep 12, 2011, at 3:59 PM, Bruno Cardoso Lopes wrote:

> Author: bruno
> Date: Mon Sep 12 17:59:23 2011
> New Revision: 139553
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=139553&view=rev
> Log:
> Fix PR10845. SUBREG_TO_REG shouldn't be used when the input and
> destination types are equal!

Hi Bruno,

Should tablegen catch this and emit an error?

-Chris

> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86InstrSSE.td
>    llvm/trunk/test/CodeGen/X86/avx-basic.ll
> 
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=139553&r1=139552&r2=139553&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 12 17:59:23 2011
> @@ -4250,11 +4250,11 @@
>   // AVX 128-bit movd/movq instruction write zeros in the high 128-bit part.
>   let AddedComplexity = 20 in {
>     def : Pat<(v4i32 (X86vzmovl (loadv4i32 addr:$src))),
> -              (SUBREG_TO_REG (i32 0), (VMOVZDI2PDIrm addr:$src), sub_xmm)>;
> +              (VMOVZDI2PDIrm addr:$src)>;
>     def : Pat<(v4i32 (X86vzmovl (bc_v4i32 (loadv4f32 addr:$src)))),
> -              (SUBREG_TO_REG (i32 0), (VMOVZDI2PDIrm addr:$src), sub_xmm)>;
> +              (VMOVZDI2PDIrm addr:$src)>;
>     def : Pat<(v4i32 (X86vzmovl (bc_v4i32 (loadv2i64 addr:$src)))),
> -              (SUBREG_TO_REG (i32 0), (VMOVZDI2PDIrm addr:$src), sub_xmm)>;
> +              (VMOVZDI2PDIrm addr:$src)>;
>   }
>   // Use regular 128-bit instructions to match 256-bit scalar_to_vec+zext.
>   def : Pat<(v8i32 (X86vzmovl (insert_subvector undef,
> @@ -4347,11 +4347,11 @@
> 
> let Predicates = [HasAVX], AddedComplexity = 20 in {
>   def : Pat<(v2i64 (X86vzmovl (loadv2i64 addr:$src))),
> -            (SUBREG_TO_REG (i64 0), (VMOVZQI2PQIrm addr:$src), sub_xmm)>;
> +            (VMOVZQI2PQIrm addr:$src)>;
>   def : Pat<(v2i64 (X86vzmovl (bc_v2i64 (loadv4f32 addr:$src)))),
> -            (SUBREG_TO_REG (i64 0), (VMOVZQI2PQIrm addr:$src), sub_xmm)>;
> +            (VMOVZQI2PQIrm addr:$src)>;
>   def : Pat<(v2i64 (X86vzload addr:$src)),
> -            (SUBREG_TO_REG (i64 0), (VMOVZQI2PQIrm addr:$src), sub_xmm)>;
> +            (VMOVZQI2PQIrm addr:$src)>;
> }
> 
> //===---------------------------------------------------------------------===//
> @@ -4392,9 +4392,9 @@
>   }
>   let Predicates = [HasAVX] in {
>     def : Pat<(v2i64 (X86vzmovl (bc_v2i64 (loadv4i32 addr:$src)))),
> -              (SUBREG_TO_REG (i64 0), (VMOVZPQILo2PQIrm addr:$src), sub_xmm)>;
> +              (VMOVZPQILo2PQIrm addr:$src)>;
>     def : Pat<(v2f64 (X86vzmovl (v2f64 VR128:$src))),
> -              (SUBREG_TO_REG (i64 0), (MOVZPQILo2PQIrr VR128:$src), sub_xmm)>;
> +              (VMOVZPQILo2PQIrr VR128:$src)>;
>   }
> }
> 
> 
> Modified: llvm/trunk/test/CodeGen/X86/avx-basic.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-basic.ll?rev=139553&r1=139552&r2=139553&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/avx-basic.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/avx-basic.ll Mon Sep 12 17:59:23 2011
> @@ -91,3 +91,17 @@
>   ret <8 x i32> %shuffle
> }
> 
> +;;; Don't crash on movd
> +; CHECK: _VMOVZQI2PQI
> +; CHECK: vmovd (%
> +define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind {
> +allocas:
> +  %ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32*
> +  %val.i34.i = load i32* %ptrcast.i33.i, align 4
> +  %ptroffset.i22.i992 = getelementptr [0 x float]* %aFOO, i64 0, i64 1
> +  %ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32*
> +  %val.i24.i = load i32* %ptrcast.i23.i, align 4
> +  %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1
> +  ret <8 x i32> %updatedret.i30.i
> +}
> +
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits