[llvm-commits] [llvm] r139344 - in /llvm/trunk: lib/Target/Mips/Mips.td lib/Target/Mips/MipsSubtarget.cpp test/CodeGen/Mips/2010-07-20-Select.ll test/CodeGen/Mips/fpcmp.ll test/CodeGen/Mips/mips1f64ldst.ll test/CodeGen/Mips/select.ll

Akira Hatanaka ahatanak at gmail.com
Thu Sep 8 18:13:27 PDT 2011


Author: ahatanak
Date: Thu Sep  8 20:13:27 2011
New Revision: 139344

URL: http://llvm.org/viewvc/llvm-project?rev=139344&view=rev
Log:
Change default target architecture from Mips1 to Mips32r1 in preparation for
removing support for Mips1 and Mips2. 

This change and the ones that follow have been discussed with and approved by
Bruno.

Modified:
    llvm/trunk/lib/Target/Mips/Mips.td
    llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
    llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll
    llvm/trunk/test/CodeGen/Mips/fpcmp.ll
    llvm/trunk/test/CodeGen/Mips/mips1f64ldst.ll
    llvm/trunk/test/CodeGen/Mips/select.ll

Modified: llvm/trunk/lib/Target/Mips/Mips.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.td?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips.td Thu Sep  8 20:13:27 2011
@@ -79,6 +79,7 @@
 def : Proc<"mips2", [FeatureMips2]>;
 def : Proc<"r6000", [FeatureMips2]>;
 
+def : Proc<"mips32r1", [FeatureMips32]>;
 def : Proc<"4ke", [FeatureMips32r2]>;
 
 // Allegrex is a 32bit subset of r4000, both for integer and fp registers,

Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Thu Sep  8 20:13:27 2011
@@ -31,8 +31,7 @@
 {
   std::string CPUName = CPU;
   if (CPUName.empty())
-    CPUName = "mips1";
-  MipsArchVersion = Mips1;
+    CPUName = "mips32r1";
 
   // Parse features string.
   ParseSubtargetFeatures(CPUName, FS);

Modified: llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll Thu Sep  8 20:13:27 2011
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s
-; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic | FileCheck %s
+; RUN: llc < %s -march=mips -relocation-model=static -mcpu=mips1 | FileCheck %s
+; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic -mcpu=mips1 | FileCheck %s
 ; Fix PR7473
 
 define i32 @main() nounwind readnone {

Modified: llvm/trunk/test/CodeGen/Mips/fpcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/fpcmp.ll?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/fpcmp.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/fpcmp.ll Thu Sep  8 20:13:27 2011
@@ -1,5 +1,5 @@
 ; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
-; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1
 
 @g1 = external global i32
 

Modified: llvm/trunk/test/CodeGen/Mips/mips1f64ldst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips1f64ldst.ll?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips1f64ldst.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips1f64ldst.ll Thu Sep  8 20:13:27 2011
@@ -1,5 +1,5 @@
-; RUN: llc  < %s -march=mipsel  | FileCheck %s -check-prefix=CHECK-EL
-; RUN: llc  < %s -march=mips  | FileCheck %s -check-prefix=CHECK-EB
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EL
+; RUN: llc  < %s -march=mips -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EB
 
 @g1 = common global double 0.000000e+00, align 8
 @g2 = common global double 0.000000e+00, align 8

Modified: llvm/trunk/test/CodeGen/Mips/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/select.ll?rev=139344&r1=139343&r2=139344&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/select.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/select.ll Thu Sep  8 20:13:27 2011
@@ -1,5 +1,5 @@
 ; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
-; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1
 
 @d2 = external global double
 @d3 = external global double





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