[llvm-commits] [llvm] r139268 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Wed Sep  7 19:11:18 2011
New Revision: 139268

URL: http://llvm.org/viewvc/llvm-project?rev=139268&view=rev
Log:
Remove the "common" set of instructions shared between ARM and Thumb2 modes.  This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=139268&r1=139267&r2=139268&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Sep  7 19:11:18 2011
@@ -4320,7 +4320,6 @@
 }
 
 multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
-  let DecoderNamespace = "Common" in {
   def _OFFSET : ACI<(outs),
       !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
       !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
@@ -4416,7 +4415,6 @@
     let Inst{20} = load;
     let DecoderMethod = "DecodeCopMemInstruction";
   }
-  }
 }
 
 defm LDC  : LdStCop<{?,?,?,?}, 1, (ins pred:$p), "ldc",  "${p}">;

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=139268&r1=139267&r2=139268&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Sep  7 19:11:18 2011
@@ -342,16 +342,6 @@
     return result;
   }
 
-  // Instructions that are shared between ARM and Thumb modes.
-  // FIXME: This shouldn't really exist.  It's an artifact of the
-  // fact that we fail to encode a few instructions properly for Thumb.
-  MI.clear();
-  result = decodeCommonInstruction32(MI, insn, Address, this, STI);
-  if (result != MCDisassembler::Fail) {
-    Size = 4;
-    return result;
-  }
-
   // VFP and NEON instructions, similarly, are shared between ARM
   // and Thumb modes.
   MI.clear();
@@ -595,14 +585,6 @@
   }
 
   MI.clear();
-  result = decodeCommonInstruction32(MI, insn32, Address, this, STI);
-  if (result != MCDisassembler::Fail) {
-    Size = 4;
-    AddThumbPredicate(MI);
-    return result;
-  }
-
-  MI.clear();
   result = decodeVFPInstruction32(MI, insn32, Address, this, STI);
   if (result != MCDisassembler::Fail) {
     Size = 4;