[llvm-commits] [llvm] r139200 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/basic-thumb2-instructions.s

Jim Grosbach grosbach at apple.com
Tue Sep 6 16:10:45 PDT 2011


Yup. Fixed r139202.

On Sep 6, 2011, at 4:06 PM, Eli Friedman wrote:

> On Tue, Sep 6, 2011 at 3:53 PM, Jim Grosbach <grosbach at apple.com> wrote:
>> Author: grosbach
>> Date: Tue Sep  6 17:53:27 2011
>> New Revision: 139200
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=139200&view=rev
>> Log:
>> Thumb2 parsing and encoding for ISB.
>> 
>> Modified:
>>    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>>    llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=139200&r1=139199&r2=139200&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Sep  6 17:53:27 2011
>> @@ -2794,20 +2794,19 @@
>>  }
>> 
>>  def t2DSB : AInoP<(outs), (ins memb_opt:$opt), ThumbFrm, NoItinerary,
>> -                  "dsb", "\t$opt",
>> -                  [/* For disassembly only; pattern left blank */]>,
>> +                  "dsb", "\t$opt", []>,
>>                   Requires<[IsThumb, HasDB]> {
>>   bits<4> opt;
>>   let Inst{31-4} = 0xf3bf8f4;
>>   let Inst{3-0} = opt;
>>  }
>> 
>> -// ISB has only full system option -- for disassembly only
>> -def t2ISB : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "isb", "",
>> -                  [/* For disassembly only; pattern left blank */]>,
>> -                  Requires<[IsThumb2, HasV7]> {
>> +def t2ISB : AInoP<(outs), (ins memb_opt:$opt), ThumbFrm, NoItinerary,
>> +                  "isb", "\t$opt",
>> +                  []>, Requires<[IsThumb2, HasV7]> {
> 
> Should this be HasDB?
> 
> -Eli
> 
>> +  bits<4> opt;
>>   let Inst{31-4} = 0xf3bf8f6;
>> -  let Inst{3-0} = 0b1111;
>> +  let Inst{3-0} = opt;
>>  }
>> 
>>  class T2I_ldrex<bits<2> opcod, dag oops, dag iops, AddrMode am, int sz,
>> @@ -3591,4 +3590,4 @@
>>  // Memory barriers
>>  def : InstAlias<"dmb", (t2DMB 0xf)>, Requires<[IsThumb2, HasDB]>;
>>  def : InstAlias<"dsb", (t2DSB 0xf)>, Requires<[IsThumb2, HasDB]>;
>> -//def : InstAlias<"isb", (t2ISB 0xf)>, Requires<[IsThumb2, HasDB]>;
>> +def : InstAlias<"isb", (t2ISB 0xf)>, Requires<[IsThumb2, HasDB]>;
>> 
>> Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=139200&r1=139199&r2=139200&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original)
>> +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Tue Sep  6 17:53:27 2011
>> @@ -453,6 +453,16 @@
>> 
>> 
>>  @------------------------------------------------------------------------------
>> +@ ISB
>> + at ------------------------------------------------------------------------------
>> +        isb sy
>> +        isb
>> +
>> +@ CHECK: isb   sy                      @ encoding: [0xbf,0xf3,0x6f,0x8f]
>> +@ CHECK: isb   sy                      @ encoding: [0xbf,0xf3,0x6f,0x8f]
>> +
>> +
>> + at ------------------------------------------------------------------------------
>>  @ IT
>>  @------------------------------------------------------------------------------
>>  @ Test encodings of a few full IT blocks, not just the IT instruction
>> 
>> 
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