[llvm-commits] [llvm] r138810 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h include/llvm/Target/Target.td include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/AR

[Evan Cheng]

This is a test (which does i256 math) where the ARM backend just can't handle yet. The only solution for now is to xfail it. Are there others?

Evan

On Aug 31, 2011, at 10:01 AM, Benjamin Kramer wrote:

> On Tue, Aug 30, 2011 at 12:09, Evan Cheng <evan.cheng at apple.com> wrote:
>> Author: evancheng
>> Date: Tue Aug 30 14:09:48 2011
>> New Revision: 138810
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=138810&view=rev
>> Log:
>> Follow up to r138791.
>> 
>> Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
>> call a target hook to adjust the instruction. For ARM, this is used to
>> adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
>> instructions have implicit def of CPSR (required since it now uses CPSR physical
>> register dependency rather than "glue"). If the carry flag is used, then the
>> target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
>> will remove the CPSR implicit def from the MachineInstr.
> 
> Hi Evan,
> 
> looks like this (or your previous patch) breaks some tests on arm:
> 
> $ llc < test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll -march=arm
> LLVM ERROR: Can't handle live physical register dependency!
> 
> - Ben