[llvm-commits] [llvm] r138132 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Akira Hatanaka ahatanak at gmail.com
Fri Aug 19 15:59:00 PDT 2011


Author: ahatanak
Date: Fri Aug 19 17:59:00 2011
New Revision: 138132

URL: http://llvm.org/viewvc/llvm-project?rev=138132&view=rev
Log:
Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not
needed for Mips32.


Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=138132&r1=138131&r2=138132&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Aug 19 17:59:00 2011
@@ -37,17 +37,13 @@
 
 // If I is a shifted mask, set the size (Size) and the first bit of the 
 // mask (Pos), and return true.
-static bool IsShiftedMask(uint64_t I, unsigned SizeInBits, uint64_t &Pos,
-                          uint64_t &Size) {
-  assert(SizeInBits == 32 || SizeInBits == 64);
-  bool Is32Bits = (SizeInBits == 32);
+// For example, if I is 0x003ff800, (Pos, Size) = (11, 11).  
+static bool IsShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) {
+  if (!isUInt<32>(I) || !isShiftedMask_32(I))
+     return false;
 
-  if ((Is32Bits == 32 && !isShiftedMask_32(I)) ||
-      (!Is32Bits && !isShiftedMask_64(I)))
-    return false;
-
-  Size = Is32Bits ? CountPopulation_32(I) : CountPopulation_64(I);
-  Pos = Is32Bits ? CountTrailingZeros_32(I) : CountTrailingZeros_64(I);
+  Size = CountPopulation_32(I);
+  Pos = CountTrailingZeros_32(I);
   return true;
 }
 
@@ -546,7 +542,7 @@
   uint64_t SMPos, SMSize;
   // Op's second operand must be a shifted mask.
   if (!(CN = dyn_cast<ConstantSDNode>(Mask)) ||
-      !IsShiftedMask(CN->getZExtValue(), 32, SMPos, SMSize))
+      !IsShiftedMask(CN->getZExtValue(), SMPos, SMSize))
     return SDValue();
 
   // Return if the shifted mask does not start at bit 0 or the sum of its size
@@ -579,7 +575,7 @@
     return SDValue();
 
   if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) ||
-      !IsShiftedMask(~CN->getZExtValue(), 32, SMPos0, SMSize0))
+      !IsShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0))
     return SDValue();
 
   // See if Op's second operand matches (and (shl $src, pos), mask1).
@@ -587,8 +583,7 @@
     return SDValue();
   
   if (!(CN = dyn_cast<ConstantSDNode>(And1.getOperand(1))) ||
-      !IsShiftedMask(CN->getZExtValue(), CN->getValueSizeInBits(0), SMPos1,
-                     SMSize1))
+      !IsShiftedMask(CN->getZExtValue(), SMPos1, SMSize1))
     return SDValue();
 
   // The shift masks must have the same position and size.





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