[llvm-commits] [llvm] r138073 - /llvm/trunk/utils/TableGen/CodeGenInstruction.cpp

[Jim Grosbach]

Author: grosbach
Date: Fri Aug 19 15:33:06 2011
New Revision: 138073

URL: http://llvm.org/viewvc/llvm-project?rev=138073&view=rev
Log:
Allow non zero_reg explicit values for OptionalDefOperands in aliases.

Modified:
    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=138073&r1=138072&r2=138073&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Fri Aug 19 15:33:06 2011
@@ -424,6 +424,13 @@
 
   // Handle explicit registers.
   if (ADI && ADI->getDef()->isSubClassOf("Register")) {
+    if (InstOpRec->isSubClassOf("OptionalDefOperand")) {
+      DagInit *DI = InstOpRec->getValueAsDag("MIOperandInfo");
+      // The operand info should only have a single (register) entry. We
+      // want the register class of it.
+      InstOpRec = dynamic_cast<DefInit*>(DI->getArg(0))->getDef();
+    }
+
     if (InstOpRec->isSubClassOf("RegisterOperand"))
       InstOpRec = InstOpRec->getValueAsDef("RegClass");