[llvm-commits] [PATCH] Correctly fail decoding of LDRD with odd Rt field

[Owen Anderson]

James, 

This looks good in principle, but I'm seeing a number of failures on MC/Disassembler/ARM/memory-arm-instructions.txt.  Perhaps the old tests need to be updated?

--Owen

On Aug 15, 2011, at 7:50 AM, James Molloy wrote:

> Hi,
>  
> The attached patch causes decoding to fail if the Rt field of an LDRD/STRD is odd (Rt&0x1 != 0), as specified in A.6.68. Testcase added.
>  
> I wanted to add an assert to the encoder too, but couldn't see an obvious way to do this as the Rt field is decoded by the generic "getMachineOpValue()" function direct from tablegen.
>  
> Cheers,
>  
> James
>  
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