[llvm-commits] [llvm] r137562 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Eli Friedman eli.friedman at gmail.com
Sat Aug 13 15:05:38 PDT 2011


On Sat, Aug 13, 2011 at 1:31 PM, Nadav Rotem <nadav.rotem at intel.com> wrote:
> Author: nadav
> Date: Sat Aug 13 15:31:45 2011
> New Revision: 137562
>
> URL: http://llvm.org/viewvc/llvm-project?rev=137562&view=rev
> Log:
> Fix PR 10635. When generating integer constants, the constant element type may
> be illegal, even if the requested vector type is legal. Testcase is one of the
> disabled ARM tests in the vector-select patch.
>
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=137562&r1=137561&r2=137562&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Aug 13 15:31:45 2011
> @@ -928,6 +928,13 @@
>   assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
>          "APInt size does not match type size!");
>
> +  // In some cases the vector type is legal but the element type is illegal.
> +  // In this case, promote the inserted value. The type does not need to match
> +  // the vector element type. Any extra bits introduced will be
> +  // truncated away.
> +  if (VT.isVector())
> +    EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);

This doesn't appear to handle the case where the transformed type is
narrower than the original type (consider a v2i64 constant on x86-32).

-Eli




More information about the llvm-commits mailing list