[llvm-commits] [llvm] r137217 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp test/CodeGen/ARM/inlineasm4.ll

Rafael Espindola rafael.espindola at gmail.com
Wed Aug 10 09:26:42 PDT 2011


Author: rafael
Date: Wed Aug 10 11:26:42 2011
New Revision: 137217

URL: http://llvm.org/viewvc/llvm-project?rev=137217&view=rev
Log:
Add support for the R and Q constraints.

Added:
    llvm/trunk/test/CodeGen/ARM/inlineasm4.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=137217&r1=137216&r2=137217&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Aug 10 11:26:42 2011
@@ -469,14 +469,34 @@
 
       return false;
     }
+    case 'R': // The most significant register of a pair.
+    case 'Q': { // The least significant register of a pair.
+      if (OpNum == 0)
+        return true;
+      const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
+      if (!FlagsOP.isImm())
+        return true;
+      unsigned Flags = FlagsOP.getImm();
+      unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
+      if (NumVals != 2)
+        return true;
+      unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
+      if (RegOp >= MI->getNumOperands())
+        return true;
+      const MachineOperand &MO = MI->getOperand(RegOp);
+      if (!MO.isReg())
+        return true;
+      unsigned Reg = MO.getReg();
+      O << ARMInstPrinter::getRegisterName(Reg);
+      return false;
+    }
+
     // These modifiers are not yet supported.
     case 'p': // The high single-precision register of a VFP double-precision
               // register.
     case 'e': // The low doubleword register of a NEON quad register.
     case 'f': // The high doubleword register of a NEON quad register.
     case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1.
-    case 'Q': // The least significant register of a pair.
-    case 'R': // The most significant register of a pair.
     case 'H': // The highest-numbered register of a pair.
       return true;
     }

Added: llvm/trunk/test/CodeGen/ARM/inlineasm4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm4.ll?rev=137217&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm4.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm4.ll Wed Aug 10 11:26:42 2011
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define double @f(double %x) {
+entry:
+  %0 = tail call double asm "mov     ${0:R}, #4\0A", "=&r"()
+  ret double %0
+; CHECK: f:
+; CHECK:	mov     r1, #4
+}
+
+define double @g(double %x) {
+entry:
+  %0 = tail call double asm "mov     ${0:Q}, #4\0A", "=&r"()
+  ret double %0
+; CHECK: g:
+; CHECK:	mov     r0, #4
+}





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