[llvm-commits] [llvm] r137151 - /llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp

[Benjamin Kramer]

Author: d0k
Date: Tue Aug  9 16:34:19 2011
New Revision: 137151

URL: http://llvm.org/viewvc/llvm-project?rev=137151&view=rev
Log:
The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore.

Modified:
    llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp

Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=137151&r1=137150&r2=137151&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp Tue Aug  9 16:34:19 2011
@@ -165,11 +165,6 @@
 class ARMMCInstrAnalysis : public MCInstrAnalysis {
 public:
   ARMMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
-  virtual bool isBranch(const MCInst &Inst) const {
-    // Don't flag "bx lr" as a branch.
-    return MCInstrAnalysis::isBranch(Inst) && (Inst.getOpcode() != ARM::BX ||
-           Inst.getOperand(0).getReg() != ARM::LR);
-  }
 
   virtual bool isUnconditionalBranch(const MCInst &Inst) const {
     // BCCs with the "always" predicate are unconditional branches.
@@ -185,11 +180,6 @@
     return MCInstrAnalysis::isConditionalBranch(Inst);
   }
 
-  virtual bool isReturn(const MCInst &Inst) const {
-    // Recognize "bx lr" as return.
-    return Inst.getOpcode() == ARM::BX && Inst.getOperand(0).getReg()==ARM::LR;
-  }
-
   uint64_t evaluateBranch(const MCInst &Inst, uint64_t Addr,
                           uint64_t Size) const {
     // We only handle PCRel branches for now.