[llvm-commits] [llvm] r135291 - /llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll

Chad Rosier mcrosier at apple.com
Fri Jul 15 14:04:52 PDT 2011


On Jul 15, 2011, at 1:20 PM, Chris Lattner wrote:

> 
> On Jul 15, 2011, at 12:06 PM, Chad Rosier wrote:
> 
>> Author: mcrosier
>> Date: Fri Jul 15 14:06:58 2011
>> New Revision: 135291
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=135291&view=rev
>> Log:
>> Add testcase for r135286.
> 
> Hi Chad, I don't think that this testcase would have failed before your patch.  You need to run mem2reg and possibly loop-rotate to get something that would have failed before.

Committed revision 135299.  Optimized IR to not require any additional opt passes (except -loop-idiom of course).  The CHECK-NOT was incorrect as well.  :(
It now fails prior to r135286 and passes thereafter.  Thanks for catching this Chris.

 Chad

> -Chris
> 
>> 
>> Added:
>>   llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll
>> 
>> Added: llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll?rev=135291&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll (added)
>> +++ llvm/trunk/test/Transforms/LoopIdiom/memset_noidiom.ll Fri Jul 15 14:06:58 2011
>> @@ -0,0 +1,47 @@
>> +; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s
>> +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
>> +target triple = "x86_64-apple-darwin10.0.0"
>> +
>> +; CHECK: @memset
>> +; CHECK-NOT: callq _memset
>> +define i8* @memset(i8* %b, i32 %c, i64 %len) nounwind uwtable ssp {
>> +entry:
>> +  %b.addr = alloca i8*, align 8
>> +  %c.addr = alloca i32, align 4
>> +  %len.addr = alloca i64, align 8
>> +  %p = alloca i8*, align 8
>> +  %i = alloca i32, align 4
>> +  store i8* %b, i8** %b.addr, align 8
>> +  store i32 %c, i32* %c.addr, align 4
>> +  store i64 %len, i64* %len.addr, align 8
>> +  %tmp = load i8** %b.addr, align 8
>> +  store i8* %tmp, i8** %p, align 8
>> +  store i32 0, i32* %i, align 4
>> +  br label %for.cond
>> +
>> +for.cond:                                         ; preds = %for.inc, %entry
>> +  %tmp2 = load i32* %i, align 4
>> +  %conv = sext i32 %tmp2 to i64
>> +  %tmp3 = load i64* %len.addr, align 8
>> +  %cmp = icmp ult i64 %conv, %tmp3
>> +  br i1 %cmp, label %for.body, label %for.end
>> +
>> +for.body:                                         ; preds = %for.cond
>> +  %tmp5 = load i32* %c.addr, align 4
>> +  %conv6 = trunc i32 %tmp5 to i8
>> +  %tmp7 = load i8** %p, align 8
>> +  %incdec.ptr = getelementptr inbounds i8* %tmp7, i32 1
>> +  store i8* %incdec.ptr, i8** %p, align 8
>> +  store i8 %conv6, i8* %tmp7
>> +  br label %for.inc
>> +
>> +for.inc:                                          ; preds = %for.body
>> +  %tmp8 = load i32* %i, align 4
>> +  %inc = add nsw i32 %tmp8, 1
>> +  store i32 %inc, i32* %i, align 4
>> +  br label %for.cond
>> +
>> +for.end:                                          ; preds = %for.cond
>> +  %tmp9 = load i8** %b.addr, align 8
>> +  ret i8* %tmp9
>> +}
>> 
>> 
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