[llvm-commits] [llvm] r135098 - /llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Jim Grosbach grosbach at apple.com
Wed Jul 13 15:26:58 PDT 2011


Author: grosbach
Date: Wed Jul 13 17:26:58 2011
New Revision: 135098

URL: http://llvm.org/viewvc/llvm-project?rev=135098&view=rev
Log:
ARM parsing and encoding tests for CMN/CMP.

Modified:
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=135098&r1=135097&r2=135098&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Wed Jul 13 17:26:58 2011
@@ -389,3 +389,62 @@
 
 @ CHECK: clz r1, r2                      @ encoding: [0x12,0x1f,0x6f,0xe1]
 @ CHECK: clzeq r1, r2                    @ encoding: [0x12,0x1f,0x6f,0x01]
+
+ at ------------------------------------------------------------------------------
+@ CMN
+ at ------------------------------------------------------------------------------
+  cmn r1, #0xf
+  cmn r1, r6
+  cmn r1, r6, lsl #10
+  cmn r1, r6, lsr #10
+  cmn sp, r6, lsr #10
+  cmn r1, r6, asr #10
+  cmn r1, r6, ror #10
+  cmn r7, r8, lsl r2
+  cmn sp, r8, lsr r2
+  cmn r7, r8, asr r2
+  cmn r7, r8, ror r2
+  cmn r1, r6, rrx
+
+@ CHECK: cmn	r1, #15                 @ encoding: [0x0f,0x00,0x71,0xe3]
+@ CHECK: cmn	r1, r6                  @ encoding: [0x06,0x00,0x71,0xe1]
+@ CHECK: cmn	r1, r6, lsl #10         @ encoding: [0x06,0x05,0x71,0xe1]
+@ CHECK: cmn	r1, r6, lsr #10         @ encoding: [0x26,0x05,0x71,0xe1]
+@ CHECK: cmn	sp, r6, lsr #10         @ encoding: [0x26,0x05,0x7d,0xe1]
+@ CHECK: cmn	r1, r6, asr #10         @ encoding: [0x46,0x05,0x71,0xe1]
+@ CHECK: cmn	r1, r6, ror #10         @ encoding: [0x66,0x05,0x71,0xe1]
+@ CHECK: cmn	r7, r8, lsl r2          @ encoding: [0x18,0x02,0x77,0xe1]
+@ CHECK: cmn	sp, r8, lsr r2          @ encoding: [0x38,0x02,0x7d,0xe1]
+@ CHECK: cmn	r7, r8, asr r2          @ encoding: [0x58,0x02,0x77,0xe1]
+@ CHECK: cmn	r7, r8, ror r2          @ encoding: [0x78,0x02,0x77,0xe1]
+@ CHECK: cmn	r1, r6, rrx             @ encoding: [0x66,0x00,0x71,0xe1]
+
+ at ------------------------------------------------------------------------------
+@ CMP
+ at ------------------------------------------------------------------------------
+  cmp r1, #0xf
+  cmp r1, r6
+  cmp r1, r6, lsl #10
+  cmp r1, r6, lsr #10
+  cmp sp, r6, lsr #10
+  cmp r1, r6, asr #10
+  cmp r1, r6, ror #10
+  cmp r7, r8, lsl r2
+  cmp sp, r8, lsr r2
+  cmp r7, r8, asr r2
+  cmp r7, r8, ror r2
+  cmp r1, r6, rrx
+
+@ CHECK: cmp	r1, #15                 @ encoding: [0x0f,0x00,0x51,0xe3]
+@ CHECK: cmp	r1, r6                  @ encoding: [0x06,0x00,0x51,0xe1]
+@ CHECK: cmp	r1, r6, lsl #10         @ encoding: [0x06,0x05,0x51,0xe1]
+@ CHECK: cmp	r1, r6, lsr #10         @ encoding: [0x26,0x05,0x51,0xe1]
+@ CHECK: cmp	sp, r6, lsr #10         @ encoding: [0x26,0x05,0x5d,0xe1]
+@ CHECK: cmp	r1, r6, asr #10         @ encoding: [0x46,0x05,0x51,0xe1]
+@ CHECK: cmp	r1, r6, ror #10         @ encoding: [0x66,0x05,0x51,0xe1]
+@ CHECK: cmp	r7, r8, lsl r2          @ encoding: [0x18,0x02,0x57,0xe1]
+@ CHECK: cmp	sp, r8, lsr r2          @ encoding: [0x38,0x02,0x5d,0xe1]
+@ CHECK: cmp	r7, r8, asr r2          @ encoding: [0x58,0x02,0x57,0xe1]
+@ CHECK: cmp	r7, r8, ror r2          @ encoding: [0x78,0x02,0x57,0xe1]
+@ CHECK: cmp	r1, r6, rrx             @ encoding: [0x66,0x00,0x51,0xe1]
+





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