[llvm-commits] [llvm] r134308 - /llvm/trunk/test/CodeGen/X86/atomic-or.ll

[Eric Christopher]

Author: echristo
Date: Fri Jul  1 23:06:41 2011
New Revision: 134308

URL: http://llvm.org/viewvc/llvm-project?rev=134308&view=rev
Log:
Be less specific about register allocation ordering.

Modified:
    llvm/trunk/test/CodeGen/X86/atomic-or.ll

Modified: llvm/trunk/test/CodeGen/X86/atomic-or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic-or.ll?rev=134308&r1=134307&r2=134308&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic-or.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic-or.ll Fri Jul  1 23:06:41 2011
@@ -11,7 +11,7 @@
 ; CHECK: t1:
 ; CHECK: movl    $2147483648, %eax
 ; CHECK: lock
-; CHECK-NEXT: orq %rax, (%rdi)
+; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}})
   %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
   call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
   ret void
@@ -26,7 +26,7 @@
 ; CHECK: t2:
 ; CHECK-NOT: movl
 ; CHECK: lock
-; CHECK-NEXT: orq $2147483644, (%rdi)
+; CHECK-NEXT: orq $2147483644, (%r{{.*}})
   %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483644)
   call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
   ret void