[llvm-commits] [llvm] r133171 - in /llvm/trunk/lib/Target/PTX: PTXAsmPrinter.cpp PTXISelLowering.cpp PTXInstrFormats.td PTXInstrInfo.cpp PTXInstrInfo.td PTXIntrinsicInstrInfo.td PTXRegisterInfo.td
Jakob Stoklund Olesen
stoklund at 2pi.dk
Thu Jun 16 11:27:30 PDT 2011
On Jun 16, 2011, at 10:49 AM, Justin Holewinski wrote:
> -def Preds : RegisterClass<"PTX", [i1], 8, (sequence "P%u", 0, 63)>;
> -def RRegu16 : RegisterClass<"PTX", [i16], 16, (sequence "RH%u", 0, 63)>;
> -def RRegu32 : RegisterClass<"PTX", [i32], 32, (sequence "R%u", 0, 63)>;
> -def RRegu64 : RegisterClass<"PTX", [i64], 64, (sequence "RD%u", 0, 63)>;
> -def RRegf32 : RegisterClass<"PTX", [f32], 32, (sequence "F%u", 0, 63)>;
> -def RRegf64 : RegisterClass<"PTX", [f64], 64, (sequence "FD%u", 0, 63)>;
> +def RegPred : RegisterClass<"PTX", [i1], 8, (sequence "P%u", 0, 7)>;
> +def RegI16 : RegisterClass<"PTX", [i16], 16, (sequence "RH%u", 0, 7)>;
> +def RegI32 : RegisterClass<"PTX", [i32], 32, (sequence "R%u", 0, 7)>;
> +def RegI64 : RegisterClass<"PTX", [i64], 64, (sequence "RD%u", 0, 7)>;
> +def RegF32 : RegisterClass<"PTX", [f32], 32, (sequence "R%u", 0, 7)>;
> +def RegF64 : RegisterClass<"PTX", [f64], 64, (sequence "RD%u", 0, 7)>;
Did you mean to reduce the number of registers by 8x?
/jakob
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