[llvm-commits] [llvm] r133063 - in /llvm/trunk: include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/ScheduleDAG.cpp lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp test/CodeGen/X86/2011-06-14-PreschedRegalias.ll

[Andrew Trick]

On Jun 15, 2011, at 6:53 PM, Jakob Stoklund Olesen wrote:

> Truncate all register classes to 3 registers. What else?


That's a great way to test that the spiller always terminates, eventually. It catches a lot of spiller edge cases in my experience. But will take forever to compile.

Caller-saves only?

Invert the spill weights?

-Andy