[llvm-commits] [llvm] r133043 - in /llvm/trunk/utils/TableGen: CodeGenRegisters.cpp CodeGenRegisters.h

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed Jun 15 00:09:20 2011
New Revision: 133043

URL: http://llvm.org/viewvc/llvm-project?rev=133043&view=rev
Log:
Use a SetTheory instance to expand register lists in register classes.

This prepares tablegen to compute register lists from set theoretic dag
expressions. This doesn't really make any difference as long as
Target.td still declares RegisterClass::MemberList as [Register].

Modified:
    llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
    llvm/trunk/utils/TableGen/CodeGenRegisters.h

Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.cpp?rev=133043&r1=133042&r2=133043&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenRegisters.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenRegisters.cpp Wed Jun 15 00:09:20 2011
@@ -172,9 +172,9 @@
   }
   assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
 
-  Elements = R->getValueAsListOfDefs("MemberList");
-  for (unsigned i = 0, e = Elements.size(); i != e; ++i)
-    Members.insert(RegBank.getReg(Elements[i]));
+  Elements = RegBank.getSets().expand(R);
+  for (unsigned i = 0, e = Elements->size(); i != e; ++i)
+    Members.insert(RegBank.getReg((*Elements)[i]));
 
   // SubRegClasses is a list<dag> containing (RC, subregindex, ...) dags.
   ListInit *SRC = R->getValueAsListInit("SubRegClasses");
@@ -240,6 +240,9 @@
 //===----------------------------------------------------------------------===//
 
 CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) : Records(Records) {
+  // Configure register Sets to understand register classes.
+  Sets.addFieldExpander("RegisterClass", "MemberList");
+
   // Read in the user-defined (named) sub-register indices.
   // More indices will be synthesized later.
   SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex");

Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.h?rev=133043&r1=133042&r2=133043&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenRegisters.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenRegisters.h Wed Jun 15 00:09:20 2011
@@ -16,6 +16,7 @@
 #define CODEGEN_REGISTERS_H
 
 #include "Record.h"
+#include "SetTheory.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
@@ -84,7 +85,7 @@
 
   class CodeGenRegisterClass {
     CodeGenRegister::Set Members;
-    std::vector<Record*> Elements;
+    const std::vector<Record*> *Elements;
   public:
     Record *TheDef;
     std::string Namespace;
@@ -125,7 +126,7 @@
     // Returns an ordered list of class members.
     // The order of registers is the same as in the .td file.
     ArrayRef<Record*> getOrder() const {
-      return Elements;
+      return *Elements;
     }
 
     CodeGenRegisterClass(CodeGenRegBank&, Record *R);
@@ -135,6 +136,8 @@
   // them.
   class CodeGenRegBank {
     RecordKeeper &Records;
+    SetTheory Sets;
+
     std::vector<Record*> SubRegIndices;
     unsigned NumNamedIndices;
     std::vector<CodeGenRegister> Registers;
@@ -154,6 +157,8 @@
   public:
     CodeGenRegBank(RecordKeeper&);
 
+    SetTheory &getSets() { return Sets; }
+
     // Sub-register indices. The first NumNamedIndices are defined by the user
     // in the .td files. The rest are synthesized such that all sub-registers
     // have a unique name.